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参数资料
| 型号： | MPC990FA |
| 厂商： | MOTOROLA INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP52 |
| 封装： | PLASTIC, TQFP-52 |
| 文件页数： | 6/7页 |
| 文件大小： | 106K |
| 代理商： | MPC990FA |
MPC990
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
256
AC CHARACTERISTICS (TA = 0° to 70°C, VCCA = VCCI = VCCO = 3.3 V ±5%, Termination of 50 to VCC – 2.0 V)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
fxtal
Crystal Oscillator Frequency
10
25
MHz
tr, tf
Output Rise/Fall Time
0.2
1.0
ns
20% to 80%
tpw
Output Duty Cycle
47.5
50
52.5
%
tos
Output-to-Output Skew
Same Frequency
Different Frequencies
150
250
350
ps
fVCO
PLL VCO Lock Range
VCO_Sel = ‘0’
VCO_Sel = ‘1’
400
200
800
400
MHz
FB
÷8 to ÷32 (Note 4.)
FB
÷4 to ÷32
tpd
Ref to Feedback Offset
75
250
425
ps
fref = 50 MHz (Note 5.)
fmax
Maximum Output Frequency
Qa,Qb,Qc (
÷2)
Qa,Qb,Qc (
÷4)
Qa,Qb,Qc (
÷6)
Qa,Qb,Qc (
÷8)
400
200
133
100
MHz
tjitter
Cycle–to–Cycle Jitter (Peak–to–Peak)
±50
ps
tlock
Maximum PLL Lock Time
10
ms
4. With VCO_Sel = ‘0’, the PLL will be unstable with a
÷2, ÷4 and some ÷6 feedback configurations. With VCO_Sel = ‘1’, the PLL will be unstable
with a
÷2 feedback ratio.
5. tpd is specified for 50MHz input reference FB ÷8. The window will shrink/grow proportionally from the minimum limit with shorter/longer input
reference periods. The tpd does not include jitter.
PLL INPUT REFERENCE CHARACTERISTICS (TA=0 to 70°C)
Symbol
Characteristic
Min
Max
Unit
Condition
tr, tf
TCLK Input Rise/Falls
3.0
ns
fref
Reference Input Frequency
Feedback divide 6
VCO_SEL=’0’
Feedback divide 8
Feedback divide 16
Feedback divide 24
Feedback divide 32
100
50
25
16.67
12.5
125
100
50
33.33
25
MHz
VCO_SEL=’1’
Feedback divide 4
Feedback divide 6
Feedback divide 8
Feedback divide 16
Feedback divide 24
Feedback divide 32
50
33.3
25
12.5
8.33
6.25
100
66.67
50
25
16.67
12.5
frefDC
Reference Input Duty Cycle
25
75
%
2
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