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23
6437E–ATARM–23-Apr-13
SAM9M11
8.
Peripherals
8.1
Peripheral Mapping
As shown in
Figure 6.1, the Peripherals are mapped in the upper 256 Mbytes of the address
space between the addresses 0xFFF7 8000 and 0xFFFC FFFF.
Each User Peripheral is allocated 16K bytes of address space.
8.2
Peripheral Identifiers
Table 8-1 defines the Peripheral Identifiers of the SAM9M11. A peripheral identifier is required
for the control of the peripheral interrupt with the Advanced Interrupt Controller and for the con-
trol of the peripheral clock with the Power Management Controller.
Table 8-1.
SAM9M11 Peripheral Identifiers
Peripheral ID
Peripheral Mnemonic
Peripheral Name
External Interrupt
0
AIC
Advanced Interrupt Controller
FIQ
1
SYS
System Controller Interrupt
2
PIOA
Parallel I/O Controller A,
3
PIOB
Parallel I/O Controller B
4
PIOC
Parallel I/O Controller C
5
PIOD, PIOE
Parallel I/O Controller D, Parallel I/O Controller E
6
TRNG
True Random Number Generator
7
USART0
USART 0
8
USART1
USART 1
9
USART2
USART 2
10
USART3
USART 3
11
MCI0
High Speed Multimedia Card Interface 0
12
TWI0
Two-Wire Interface 0
13
TWI1
Two-Wire Interface 1
14
SPI0
Serial Peripheral Interface
15
SPI1
Serial Peripheral Interface
16
SSC0
Synchronous Serial Controller 0
17
SSC1
Synchronous Serial Controller 1
18
TC0 .. TC5
Timer Counter 0 .. Timer Counter 5
19
PWM
Pulse Width Modulation Controller
20
TSADCC
Touch Screen ADC Controller
21
DMAC
DMA Controller
22
UHPHS
USB Host High Speed
23
LCDC
LCD Controller
24
AC97C
AC97 Controller
25
EMAC
Ethernet MAC
26
ISI
Image Sensor Interface
27
UDPHS
USB Device High Speed
28
AES, TDES, SHA
Advanced Encryption Standard, Triple Data Encryption
Standard, Secure Hash Algorithm