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参数资料
| 型号： | MR2A08AMYS35R |
| 厂商： | Everspin Technologies Inc |
| 文件页数： | 9/14页 |
| 文件大小： | 0K |
| 描述： | IC MRAM 4MBIT 35NS 44TSOP |
| 标准包装： | 1,000 |
| 格式 - 存储器： | RAM |
| 存储器类型： | MRAM（磁阻 RAM） |
| 存储容量： | 4M (512K x 8) |
| 速度： | 35ns |
| 接口： | 并联 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 44-TSOP（0.400"，10.16mm 宽） |
| 供应商设备封装： | 44-TSOP II |
| 包装： | 带卷 (TR) |
Timing Specifications
Table 3.4 Write Cycle Timing 1 (W Controlled) 1
MR2A08A
Parameter
Write cycle time 2
Address set-up time
Address valid to end of write ( G high)
Address valid to end of write ( G low)
Write pulse width ( G high)
Write pulse width ( G low)
Data valid to end of write
Data hold time
Write low to data Hi-Z 3
Write high to output active 3
Write recovery time
Symbol
t AVAV
t AVWL
t AVWH
t AVWH
t WLWH
t WLEH
t WLWH
t WLEH
t DVWH
t WHDX
t WLQZ
t WHQX
t WHAX
Min
35
0
18
20
15
15
10
0
0
3
12
Max
-
-
-
-
-
-
-
-
12
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
All write occurs during the overlap of E low and W low. Power supplies must be properly grounded and decoupled and bus
contention conditions must be minimized or eliminated during read and write cycles. If G goes low at the same time or after
W goes low, the output will remain in a high impedance state. After W or E has been brought high, the signal must remain in
steady-state high for a minimum of 2 ns. The minimum time between E being asserted low in one cycle to E being asserted
low in a subsequent cycle is the same as the minimum cycle time allowed for the device.
All write cycle timings are referenced from the last valid address to the first transition address.
2
3
This parameter is sampled and not 100% tested. Transition is measured ±200 mV from the steady-state voltage. At any given
voltage or temperature, t WLQZ (max) < t WHQX (min)
Figure 3.4 Write Cycle Timing 1 (W Controlled)
t AVAV
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
t AVWH
t WLEH
t WLWH
t WHAX
D (DATA IN)
t AVWL
t WLQZ
t DVWH
DATA VALID
t WHDX
Q (DATA OUT)
Hi -Z
Hi -Z
t WHQX
Everspin Technologies ? 2012
9
MR2A08A Rev. 6, 8/2012
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| MR2A08AVTS35C | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:256K x 16-Bit 3.3-V Asynchronous Magnetoresistive RAM |
| MR2A08AVYS35 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:256K x 16-Bit 3.3-V Asynchronous Magnetoresistive RAM |
| MR2A08AYS35 | 功能描述:NVRAM 4Mb 3.3V 35ns 512Kx8 Parallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| MR2A08AYS35R | 功能描述:NVRAM 4Mb 3.3V 35ns 512Kx8 Parallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
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