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参数资料
| 型号： | MR2A16ACMA35R |
| 厂商： | Everspin Technologies Inc |
| 文件页数： | 14/20页 |
| 文件大小： | 0K |
| 描述： | IC MRAM 4MBIT 35NS 48BGA |
| 标准包装： | 1,500 |
| 格式 - 存储器： | RAM |
| 存储器类型： | MRAM（磁阻 RAM） |
| 存储容量： | 4M (256K x 16) |
| 速度： | 35ns |
| 接口： | 并联 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-LFBGA |
| 供应商设备封装： | 48-FBGA（8x8） |
| 包装： | 带卷 (TR) |
MR2A16A
Table 11 – Write Cycle Timing 3 ( LB / UB Controlled)
Parameter 1
Write cycle time 2
Address set-up time
Address valid to end of write ( G high)
Address valid to end of write ( G low)
Write pulse width ( G high)
Write pulse width ( G low)
Data valid to end of write
Data hold time
Write recovery time
Symbol
t AVAV
t AVBL
t AVBH
t AVBH
t BLEH
t BLWH
t BLEH
t BLWH
t DVBH
t BHDX
t BHAX
Min
35
0
18
20
15
15
10
0
12
Max
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. All write occurs during the overlap of E low and W low. Power supplies must be properly grounded and decoupled and bus
contention conditions must be minimized or eliminated during read and write cycles. If G goes low at the same time or after
W goes low, the output will remain in a high impedance state. After W , E or LB/ UB has been brought high, the signal must
remain in steady-state high for a minimum of 2 ns. If both byte control signals are asserted, the two signals must have no
more than 2 ns skew between them. The minimum time between E being asserted low in one cycle to E being asserted low in
a subsequent cycle is the same as the minimum cycle time allowed for the device.
2. All write cycle timings are referenced from the last valid address to the first transition address.
Figure 10 – Write Cycle Timing 3 ( LB / UB Controlled)
t AVAV
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
UB, LB (BYTE ENABLED)
t AVBL
t AVEH
t BLEH
t BLWH
t BHAX
t DVBH
t BHDX
D (DATA IN)
Data Valid
Q (DATA OUT)
Hi -Z
Hi -Z
Copyright ? Everspin Technologies 2013
14
MR2A16A Rev. 11, 10/2013
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| MR2A16ACTS35C | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:256K x 16-Bit 3.3-V Asynchronous Magnetoresistive RAM |
| MR2A16ACYS35 | 功能描述:NVRAM 4Mb 3.3V 35ns 256Kx16 Prallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| MR2A16ACYS35R | 功能描述:NVRAM 4Mb 3.3V 35ns 256Kx16 Prallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| MR2A16AMA35 | 功能描述:NVRAM 4Mb 3.3V 35ns 256Kx16 Prallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| MR2A16AMA35R | 功能描述:NVRAM 4Mb 3.3V 35ns 256Kx16 Prallel MRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
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