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参数资料
| 型号： | MS52C1162A |
| 厂商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 65,536-Word × 16-Bit or 131,072-Word × 8-Bit STATIC RAM +1,048,576-Word × 16-Bit or 2,097,152-Word × 8-Bit One Time PROM(64k字×16位或128k字×8位静态RAM+1M字×16位或2M字×8位 OTPROM) |
| 中文描述： | 65,536字× 16位或131,072词× 8位静态RAM 1048576，字× 16位或2097152，字× 8位一次性可编程（64k的字× 16位或128K的字× 8位静态RAM的100万字× 16位或200万字× 8位OTPROM） |
| 文件页数： | 10/19页 |
| 文件大小： | 141K |
| 代理商： | MS52C1162A |
8-bit Read Mode (BYTE=V
IL
)
SRAM Read Cycle (2)
MS52C1162A
A0 - A15
t
RC
CEs
t
AA
t
CO
t
CLZ
t
OLZ
t
OH
t
CHZ
SRAM Timing Diagrams
OE
t
OE
t
OHZ
Valid Data-Out
I/O0 - I/O15
10
16-bit Read Mode (BYTE=V
IH
)
SRAM Read Cycle (1)
A-1 - A15
t
RC
CEs
t
AA
t
CO
t
CLZ
t
OLZ
t
OH
t
CHZ
OE
t
OE
t
OHZ
Valid Data-Out
I/O0 - I/O7
I/O8 - I/O15
High-Z
High-Z
Notes : 1. A read cycle of SRAM occurs during the overlap of CEo="H", CEs="L", OE="L" and WE="H".
2.
t
OHZ ,
t
CHZ are specified by the time when DATA is floating , not defined by the output level.
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