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参数资料
型号： MSC1214Y2PAGTG4
厂商： TEXAS INSTRUMENTS INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封装： GREEN, PLASTIC, TQFP-64
文件页数： 46/111页
文件大小： 1102K
代理商： MSC1214Y2PAGTG4
MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
4
ELECTRICAL CHARACTERISTICS: AVDD = 5V (continued)
All specifications from TMIN to TMAX, DVDD = +2.7V to 5.25V, AVDD = +5V, fMOD = 15.625kHz, PGA = 1, filter = Sinc3, Buffer ON, fDATA = 10Hz, Bipolar, fCLK = 8MHz,
and VREF ≡ (REF IN+) (REF IN) = +2.5V, unless otherwise noted. For VDAC, VREF = AVDD, RLOAD = 10k, and CLOAD = 200pF, unless otherwise noted.
MSC1211/12/13/14
PARAMETER
UNITS
MAX
TYP
MIN
CONDITIONS
Voltage Reference Inputs
Reference Input Range
REF IN+, REF IN
AGND
AVDD(3)
V
VREF
VREF ≡ (REF IN+) (REF IN)
0.1
2.5
AVDD
V
VREF Common-Mode Rejection
At DC
110
dB
Input Current(5)
VREF = 2.5V, ADC Only
1
A
DAC Reference Input Resistance
For Each DAC, PGA = 1
20
k
On-Chip Voltage Reference
Output Voltage
VREFH = 1 at +25
°C, REFCLK = 250kHz
2.495
2.5
2.505
V
Output Voltage
VREFH = 0 at +25
°C, REFCLK = 250kHz
1.25
V
Power-Supply Rejection Ratio
65
dB
Short-Circuit Current Source
2.6
mA
Short-Circuit Current Sink
50
A
Short-Circuit Duration
Sink or Source
Indefinite
Drift
5
ppm/
°C
Output Impedance
Sourcing 100
A
3
Startup Time from Power ON
CREFOUT = 0.1F
8
ms
Temperature Sensor Voltage
Buffer ON, T = +25
°C
115
mV
Temperature Sensor Coefficient
Buffer ON
375
V/°C
Voltage DAC Static Performance(6)
Resolution
16
Bits
Relative Accuracy
±0.05
±0.146
%FSR
Differential Nonlinearity
Ensured Monotonic by Design
±1
LSB
Zero Code Error
All 0s Loaded to DAC Register
+13
+35
mV
Full-Scale Error
All 1s Loaded to DAC Register
1.25
0
% of FSR
Gain Error
1.25
0
+1.25
% of FSR
Zero Code Error Drift
±20
V/°C
Gain Temperature Coefficient
±5
ppm of FSR/
°C
Voltage DAC Output Characteristics(7)
Output Voltage Range
REF IN+ = AVDD
AGND
AVDD
V
Output Voltage Settling Time
To
±0.003% FSR, 0200h to FD00h
8
s
Slew Rate
1
V/
s
DC Output Impedance
7
Short-Circuit Current
All 1s Loaded to DAC Register
20
mA
IDAC Output Characteristics
Full-Scale Output Current
Maximum VREF = 2.5V
25
mA
Maximum Short-Circuit Current Duration
Indefinite
Compliance Voltage
AVDD 1.5
V
Relative Accuracy
0.185
% of FSR
Zero Code Error
All 0s Loaded to DAC Register
0.5
A
Full-Scale Error
All 1s Loaded to DAC Register
0.4
% of FSR
Gain Error
0.6
% of FSR
(1) The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7M/64).
(2) Calibration can minimize these errors.
(3) The self gain calibration cannot have a REF IN+ of more than AVDD 1.5V with Buffer ON. To calibrate gain, turn Buffer OFF.
(4) VOUT is change in digital result.
(5) 9pF switched capacitor at fSAMP clock frequency (see Figure 14).
(6) Linearity calculated using a reduced code range of 512 to 65024; output unloaded.
(7) Ensured by design and characterization; not production tested.
(8) Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1).
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