
17-2
MSM66573 Family User's Manual
Chapter 17 Bus Port Functions
Table 17-1 P0, P1, P2, P3_1 and P4 Operation During Program Memory Access
17.2.2 Port Operation When Accessing Data Memory
When accessing internal data memory (addresses 0H to 11FFH), P0, P1, P2, P3_2, P3_3
and P4 operate as I/O ports.
When accessing external data memory (addresses 1200H to 0FFFFFH), set ports P0, P1,
P2, P3_2, P3_3 and P4 to their secondary functions so that P0 operates as a data I/O pin,
P1, P2, and P4 operate as address output pins, and P3_2 and P3_3 operate as
RD and WR
output pins.
If the
EA pin is at a low level, P0, P1, P2 and P4 are automatically set as bus ports (secondary
function control registers and mode registers are set) when reset (
RES signal input,
execution of a BRK instruction, overflow of the watchdog timer, opcode trap). Because
P3_2 and P3_3 are automatically set as input ports instead of
RD and WR output pins,
before external data memory is accessed, they must be set as secondary function outputs.
Of the ports that are automatically set as bus port functions when the
EA pin is at a low level,
if upper address or other output is unnecessary, then after reset, those ports can be
operated as I/O ports by resetting their secondary function control register.
Table 17-2 lists the operation of P0, P1, P2, P3_2, P3_3 and P4 during a data memory
access.
Memory to be
accessed
Address
P0 operation
P1, P2, P4
operation
P3_1 operation
Internal program
When EA = H,
0H to 0FFFFH
I/O port
External program
When EA = H,
10000H to 0FFFFFH
After set as
secondary
function output,
program data input
After set as
secondary
function output,
address output
After set as
secondary
function output,
PSEN output
When EA = L,
0H to 0FFFFFH
Program data input
Address output
PSEN output
[Note]
When P0, P1, P2 and P4 are set as secondary function outputs, each of these ports enters
a pulled-up state while external program memory is not accessed.