
14-1
MSM66573 Family User's Manual
Chapter 14 Peripheral Functions
14
14. Peripheral Functions
14.1 Overview
The MSM66573 family has the following functions to service peripheral ICs: a clock out
function, an external XTCLK input control function, a HOLD input control function, and a
WAIT input control function. These functions can be specified with the peripheral control
register (PRPHCON).
14.2 Description of Each Peripheral Function
14.2.1 Clock Out Function
The clock out function has following two functions :
To output a frequency divided clock of the main clock (OSCCLK) via the CLKOUT pin.
To output the subclock (XTCLK) via the XTOUT pin.
The main clock frequency division ratio is specified with bit 0 and bit 1 (CLKO0 and CLKO1)
of the peripheral control register (PRPHCON).
When the CLKOUT pin is to be used, P11_2 must be configured as a secondary function
output.
When the XTOUT pin is used to output the subclock (XTCLK), P11_3 must be configured
as a secondary function output.
14.2.2 External XTCLK Input Control Function
Because XT oscillation operates on an internally regulated voltage, an external CLK cannot
normally be input to the oscillation pin. However, if bit 4 (EXTXT) of the peripheral control
register (PRPHCON) is set to "1", the internally regulated voltage is switched to VDD and
the oscillation feedback resistor is turned off, enabling the input of an external XTCLK (VDD
level) to the XT pin.
14.2.3 HOLD Input Control Function
If the HOLD mode, a standby function, is to be used, set bit 5 (HOLD) of the peripheral
control register (PRPHCON) to "1". Configuring P9_7 as a secondary function output
(HLDACK) enables the output of a signal that indicates availability of the bus (to transfer
to the HOLD mode).
14.2.4 WAIT Input Control Function
Setting bit 6 (WAIT) of the peripheral control register (PRPHCON) to "1" enables wait cycles
to be inserted by an external device when accessing an external data memory area.