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参数资料
| 型号： | MSM82C54-2RS |
| 厂商： | OKI SEMICONDUCTOR CO., LTD. |
| 元件分类： | 定时器 |
| 英文描述： | CMOS PROGRAMMABLE INTERVAL TIMER |
| 中文描述： | CMOS可编程间隔计时器 |
| 文件页数： | 10/23页 |
| 文件大小： | 161K |
| 代理商： | MSM82C54-2RS |
18/23
Semiconductor
MSM82C54-2RS/GS/JS
(3) Read Back Command Operation
Use of the read back command enables the user to check the count value, program mode,
output pin state and null count flag of the selected counter.
The command is written in the control word register, and the format is as shown below. For
this command, the counter selection occurs according to bits D3, D2 and D1.
It is possible to latch multiple counters by using the read back command. Latching of a read
counter is automatically canceled but other counters are kept latched. If multiple read back
commands are written for the same counter, commands other than the first one are ignored.
It is also possible to latch the status information of each counter by using the read back
command. The status of a certain counter is read when the counter is read. The counter
status format is as follows:
Bits D5 to D0 indicate the mode programmed by the most recently written control word.
Bit D7 indicates the status of the output pin.
Use of this bit makes it possible to monitor the counter output, so the corresponding
hardware may be omitted.
OUTPUT
D7
NULL
COUNT
D6
RL1
D5
RL0
D4
M2
D3
M1
D2
M0
D1
BCD
D0
D7: 1 = Output pin status is 1.
0 = Output pin status is 0.
D6: 1 = Null count
0 = Count value reading is effective
D5 - D0: Programmed mode of counter
(See the control word format.)
1
D7
1
D6
COUNT
D5
STATUS
D4
CNT2
D3
CNT1
D2
CNT0
D1
0
D0
(CS=0, A0, A1=1, RD=1, WR=0)
D5: 0 = Selected counter latch operation
D4: 0 = Selected counter status latch operation
D3: 1 = Counter #2 selection
D2: 1 = Counter #1 selection
D1: 1 = Counter #0 selection
D0: 0 = Fixed
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