参数资料
型号: MSM82C59A-2
厂商: OKI SEMICONDUCTOR CO., LTD.
英文描述: Programmable Universal Timers(可编程中断控制器,单片8中断控制,可级联成64中断控制)
中文描述: 可编程通用定时器(可编程中断控制器,单片8中断控制,可级联成64中断控制)
文件页数: 14/28页
文件大小: 187K
代理商: MSM82C59A-2
14/28
Semiconductor
MSM82C59A-2RS/GS/JS
(ii) Operation Command Words (OCW1 thru OCW3)
These commands are used in operating the MSM82C59A-2 in the following modes.
a. Fully Nested Mode
b. Rotating Priority Mode
c. Special Mask Mode
d. Polled Mode
The OCW can be written into the MSM82C59A-2 any time after initialization has been
completed.
(5) Initialization Command Words (ICW1 thru ICW4)
When a command is issued with D
4
= 1 and A
0
= 0, it is always regarded as an Initialization
Command Word 1 (ICW1). Starting of the initialization sequence by ICW1 results in
automatic execution of the following steps.
a. The edge sense circuit is reset, and a low to high transition is necessary to generate an
interrupt.
b. The interrupt mask register is cleared.
c. The IR
7
input is assigned priority 7 (lowest priority)
d. Slave mode address is set to 7.
e. The Special Mask Mode is cleared, and the Status Read is set to IRR.
f. All ICW4 functions are cleared if IC4 = 0, resulting in a change to Non-Buffered mode, no-
Auto EOI, and 85 mode.
Note: Master/slave in ICW4 can only be used in buffered mode.
(i)
Initialization Command Words 1 and 2 (ICW1 and ICW2)
A
4
thru A
15
: (Starting address of interrupt service routines)
In 85 mode, 8 request levels CALL 8 locations at equivalent intervals in
the memory. The memory location interval can be set at this stage to 4 or
8 by program. (
ADI)Hence, either 32 or 64 bytes/page respectively are
used in the 8 routines.
The address format is 2 bytes long (A
0
thru A
15
). When the routine
interval is 4, A
0
thru A
4
are inserted automatically by the MSM82C59A-
2, and A
5
thru A
15
are programmed externally. When the interval is 8,
on the other hand, A
0
thru A
5
are inserted automatically by the
MSM82C59A-2, and A
6
thru A
15
are programmed externally. In 86
mode, T
3
thru T
7
are inserted in the 5 most significant bits of the vector
type. And the MSM82C59A-2 sets the 3 least significant bits according to
the interrupt level. A
0
thru A
10
are ignored, and the ADI (address
interval) has no effect.
LTIM:
The MSM82C59A-2 is operated in level triggered mode when LTIM = 1,
and the interrupt input edge circuit becomes disabled.
ADI:
Designation of the CALL address interval. Interval = 4 when ADI = 1,
and interval = 8 when ADI = 0.
SNGL:
SNGL = 1 indicates the existence of only one MSM82C59A-2 in the
system. ICW3 is not required when SNGL = 1.
IC4:
ICW4 is required when this bit is set, but not required when IC4 = 0.
相关PDF资料
PDF描述
MSM82C84A-2 Clock Generator And Driver(时钟发生器驱动器,输出时钟频率2~8MHz)
MSM9888L Flash-driving Recording and Playback IC
MSR860 SOFT RECOVERY POWER RECTIFIER 8.0 AMPERES 600 VOLTS
MTB10N40E TMOS POWER FET 10 AMPERES
MTB1306 TMOS POWER FET 75 AMPERES
相关代理商/技术参数
参数描述
MSM82C59A-2GS 制造商:OKI 制造商全称:OKI electronic componets 功能描述:PROGRAMMABLE INTERRUPT CONTROLLER
MSM82C59A-2GS-K 制造商:ROHM Semiconductor 功能描述:
MSM82C59A-2JS 制造商:ROHM Semiconductor 功能描述:
MSM82C59A-2JSDR1 制造商:ROHM Semiconductor 功能描述:
MSM82C59A-2JS-DR1 制造商:ROHM Semiconductor 功能描述:PROGRAMMABLE INTERRUPT CONTROLLER