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参数资料
| 型号： | MSP430G2433IRHB32T |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC32 |
| 封装： | GREEN, PLASTIC, QFN-32 |
| 文件页数： | 13/63页 |
| 文件大小： | 831K |
| 代理商： | MSP430G2433IRHB32T |
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MSP430G2x33
MSP430G2x03
SLAS734C
– APRIL 2011 – REVISED AUGUST 2011
Schmitt-Trigger Inputs, Ports Px
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
0.45 VCC
0.75 VCC
VIT+
Positive-going input threshold voltage
V
3 V
1.35
2.25
0.25 VCC
0.55 VCC
VIT–
Negative-going input threshold voltage
V
3 V
0.75
1.65
Vhys
Input voltage hysteresis (VIT+ – VIT–)
3 V
0.3
1
V
For pullup: VIN = VSS
RPull
Pullup/pulldown resistor
3 V
20
35
50
k
For pulldown: VIN = VCC
CI
Input capacitance
VIN = VSS or VCC
5
pF
Leakage Current, Ports Px
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
MAX
UNIT
Ilkg(Px.y)
High-impedance leakage current
(1) (2)
3 V
±50
nA
(1)
The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.
(2)
The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is
disabled.
Outputs, Ports Px
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
I(OHmax) = –6 mA
(1)
3 V
VCC – 0.3
V
VOL
Low-level output voltage
I(OLmax) = 6 mA
(1)
3 V
VSS + 0.3
V
(1)
The maximum total current, I(OHmax) and I(OLmax), for all outputs combined should not exceed ±48 mA to hold the maximum voltage drop
specified.
Output Frequency, Ports Px
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Port output frequency
fPx.y
Px.y, CL = 20 pF, RL = 1 kΩ
(1) (2)
3 V
12
MHz
(with load)
fPort_CLK
Clock output frequency
Px.y, CL = 20 pF
(2)
3 V
16
MHz
(1)
A resistive divider with two 0.5-k
Ω resistors between VCC and VSS is used as load. The output is connected to the center tap of the
divider.
(2)
The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
20
Copyright
2011, Texas Instruments Incorporated
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