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参数资料
| 型号： | MT28F321P18FG-90BET |
| 元件分类： | PROM |
| 英文描述： | 2M X 16 FLASH 1.8V PROM, 90 ns, PBGA48 |
| 封装： | FBGA-48 |
| 文件页数： | 16/35页 |
| 文件大小： | 386K |
| 代理商： | MT28F321P18FG-90BET |
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23
2 Meg x 16 Page Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT28F321P20_3.p65 – Rev. 3, Pub. 7/02
2002, Micron Technology, Inc.
2 MEG x 16
PAGE FLASH MEMORY
PRELIMINARY
ABSOLUTE MAXIMUM RATINGS*
Voltage to Any Ball Except VCC and VPP
with Respect to VSS ....................... -0.5V to +2.45V
VPP Voltage (for BLOCK ERASE and PROGRAM
with Respect to VSS) ................. -0.5V to +13.5V**
VCC and VCCQ Supply Voltage
with Respect to VSS ....................... -0.3V to +2.45V
Output Short Circuit Current ............................... 100mA
Operating Temperature Range ............ -40oC to +85oC
Storage Temperature Range ............... -55oC to +125oC
Soldering Cycle .......................................... 260oC for 10s
*Stresses greater than those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other conditions
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
**Maximum DC voltage on VPP may overshoot to +13.5V
for periods <20ns.
OPERATING CONDITIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTE
Operating temperature
t A
-40
+85
oC
VCC supply voltage (MT28F321P18)
VCC
1.70
1.90
V
VCC supply voltage (MT28F321P20)
VCC
1.80
2.20
V
I/O supply voltage (MT28F321P18)
VCCQ
1.70
1.90
V
I/O supply voltage (MT28F321P20)
VCCQ
1.80
2.20
V
VPP voltage
VPP1
0.9
2.2
V
VPP in-factory programming voltage
VPP2
11.4
12.6
V
Block erase cycling
VPP = VPP1
VPP1
–
100,000
Cycles
VPP = VPP2
VPP2
–
100
Cycles
1
NOTE: 1. VPP = VPP2 is a maximum of 10 cumulative hours.
Figure 11
Output Load Circuit
I/O
14.5K
30pF
VCC
VSS
14.5K
Output
Test Points
Input
VCC
VSS
AC test inputs are driven at VCC for a logic 1 and VSS for a logic 0. Input timing begins at VCC/2, and output timing ends
at VCCQ/2. Input rise and fall times (10% to 90%) < 5ns.
VCCQ/2
VCC/2
Figure 10
AC Input/Output Reference Waveform
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|---|---|
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