参数资料
型号: MT28F644W18FE-705KTET
元件分类: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封装: VFBGA-56
文件页数: 18/67页
文件大小: 859K
代理商: MT28F644W18FE-705KTET
4 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
09005aef8098d2b5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT28F644W30.fm – Rev. E, Pub. 12/03 EN
25
2003 Micron Technology. Inc. All rights reserved.
Fast Programming Algorithm (FPA)
Mode
The fast programming algorithm (FPA) is intended
for in-factory use. It enables fast data stream program-
ming. For in-factory programming, FPA minimizes
chip programming time when 11.4V
< VPP < 12.6V. FPA
algorithm can also provide accelerated program with
VPP = 1.8V. Executing the FPA command (30h) followed
by FPA CONFIRM (D0h), enables an entire block to be
programmed. This eliminates the need to continu-
ously update the address to be programmed.
An initial delay is required after issuing the FPA
command. (See Table 25.) If the block is locked, the
status register returns an error. When the FPA com-
mand is executed successfully, a data stream can be
programmed beginning at the first address. The
address can be held constant, or it can be incremented
within the address range. The program cycle ends
when the programmer writes FFFFh outside the
address range of the current block.
When the FPA is activated, the data must be pro-
vided in sequential order to the WSM. Immediately
after programming, verification is executed. The data
sequence and starting address are provided to the
WSM, which automatically performs a data verifica-
tion. The result is stored in the status register. Writing
FFFFh outside the memory block boundary exits the
verification cycle. Figure 9 shows the FPA flowchart.
Note that issuing a 70h command to the device after
FPA setup will be interpreted as data and will be writ-
ten to the device.
Figure 9: Fast Programming Algorithm (FPA) Flowchart (in-factory only)
NOTE:
1. When reading the status register, the address must be within the block being programmed.
2. During FPA verify, if a word fails to verify, status changes to 90h.
3. BA = Address within block.
4. WA = First word Address to be written in the block.
Start
FPA Setup
Exit
Operation
Complete
WRITE 30h
Address = WA4
WRITE D0h
Address = WA4
FPA Setup Time
Read
Status Register1
Check VPP and
Lock Errors
(SR3, SR1)
Unlock Block
SR7 = 0
SR7 = 1
FPA Setup
Done?
WRITE Data
Address = WA4
Read
Status Register
WRITE FFFFh
Address
≠ BA3
Read
Status Register1
SR0 = 0
SR0 = 1
SR0 = 0
SR0 = 1
Yes
No
SR0 = 0
SR0 = 1
Yes
No
Data
Stream Ready?
Program
Done?
Last Data?
WRITE Data
Address = WA4
Read
Status Register2
WRITE FFFFh
Address
≠ BA3
Read
Status Register1
SR0 = 0
SR0 = 1
Verify
Stream Ready?
Verify
Done?
Last Data?
Full Status
Check Procedure
Read
Status Register1
SR7 = 1
SR7 = 0
FPA
Exited?
FPA Program
FPA Verify
FPA Exit
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