- 您现在的位置：买卖IC网 > PDF目录45594 > MUAC8K64-70TDI SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100 PDF资料下载
参数资料
| 型号： | MUAC8K64-70TDI |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 13/32页 |
| 文件大小： | 504K |
| 代理商： | MUAC8K64-70TDI |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
MUAC Routing CoProcessor (RCP) Family
Control State Descriptions
20
Rev. 4
Control State:
Indirect Write at Address;
Increment Address Register
Mnemonic:
WRs[AR]+{MRnnn}
Binary Op-Code: XXX nnn 100 110
/W: LOW
/AV: HIGH
PA:AA: aaa
Scope: AS
Description: Writes data from the DQ31-0 bus to bits
31-0 (DSC LOW) or 63-32 (DSC HIGH) of the location
defined by the contents of the Address register. The
validity of the location is set by the state of the /VB input,
/VB = LOW: Valid, /VB = HIGH: Empty. The write is
masked by bits 31-0 (DSC LOW) or 63-32 (DSC HIGH)
of the contents of Mask Register nnn. When nnn=000 no
mask is used; when masking is selected, only bits in the
addressed location that correspond to LOW values in the
selected mask register are updated. The contents of the
Address register are incremented.
Control State:
Indirect Read at Address;
Increment Address Register
Mnemonic:
RDs[AR]+
Binary Op-Code: XXX XXX 100 110
/W: HIGH
/AV: HIGH
PA:AA: aaa
Scope: S
Description: Reads data from bits 31-0 (DSC LOW) or
63-32 (DSC HIGH) of the location defined by the contents
of the Address register to the DQ31-0 bus. This control
state provides indirect random access memory reads.
During the Read cycle, the /VB line carries the Validity Bit
value of the addressed location. The contents of the
Address register are incremented.
Control State:
Indirect Write at Address;
Decrement Address Register
Mnemonic:
WRs[AR]-{MRnnn}
Binary Op-Code: XXX nnn 100 111
/W: LOW
/AV: HIGH
PA:AA: aaa
Scope: AS
Description: Writes data from bits 31–0 (DSC LOW) or
63-32 (DSC HIGH) of the DQ31–0 bus to the location
defined by the contents of the Address register. The
validity of the location is set by the state of the /VB input,
/VB = LOW: Valid, /VB = HIGH: Empty. The write is
masked by bits 31–0 (DSC LOW) or 63-32 (DSC HIGH)
of the contents of Mask Register nnn. When nnn=000 no
mask is used; when masking is selected, only bits in the
addressed location that correspond to LOW values in the
selected mask register are updated. The contents of the
Address register are decremented.
Control State:
Indirect Read at Address;
Decrement Address Register
Mnemonic:
RDs[AR]-
Binary Op-Code: XXX XXX 100 111
/W: HIGH
/AV: HIGH
PA:AA: aaa
Scope: S
Description: Reads data from bits 31–0 (DSC LOW) or
63-32 (DSC HIGH) of the location defined by the contents
of the Address register to the DQ31–0 bus. This control
state provides indirect random access memory reads.
During the Read cycle, the /VB line carries the Validity Bit
value of the addressed location. The contents of the
Address register are decremented.
Control State:
Write to Highest-Priority
Matching Location
Mnemonic:
WRs[HPM]{MRnnn}
Binary Op-Code: XXX nnn 000 010
/W: LOW
/AV: HIGH
PA:AA: HPMA
Scope: HPD
Description: Writes data from the DQ31-0 bus to bits
31-0 (DSC LOW) or 63-32 (DSC HIGH) of the
highest-priority matching location in the Memory array.
The validity of the location is set by the state of the /VB
input, /VB=LOW: Valid, /VB=HIGH: Empty. The write is
masked by bits 31–0 (DSC LOW) or 63-32 (DSC HIGH)
of the contents of Mask Register nnn. When nnn=000 no
mask is used; when masking is selected, only bits in the
addressed location that correspond to LOW values in the
selected mask register are updated.
Control State:
Read Highest-Priority
Matching Location
Mnemonic:
RDs[HPM]
Binary Op-Code: XXX XXX 000 010
/W: HIGH
/AV: HIGH
PA:AA: HPMA
Scope: HPD
Description: Reads data from bits 31–0 (DSC LOW) or
63-32 (DSC HIGH) the
location
defined by the
highest-priority matching location to the DQ31–0 bus. In
the event that the previous Comparison cycle resulted in a
mismatch,
the
DQ31–0
bus
will
remain
in
high-impedance.
相关PDF资料 |
PDF描述 |
|---|---|
| MUNICH128X | 4 CHANNEL(S), 8.192M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| MUPA64K16-15TJI | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128 |
| MUR1005FCT | 10 A, 50 V, SILICON, RECTIFIER DIODE, TO-220AB |
| MUR1020FCT | 10 A, 200 V, SILICON, RECTIFIER DIODE, TO-220AB |
| MUR1030FCT | 10 A, 300 V, SILICON, RECTIFIER DIODE, TO-220AB |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MUB08A | 制造商:NSC 制造商全称:National Semiconductor 功能描述:1W, Bypass-Capacitor-less Audio Amplifier with Internal Selectable Gain |
| MUB25-10DZ | 制造商:SMC Corporation of America 功能描述:Cylinder, compact, plate, dbl act, 25mm |
| MUB31DH | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:LOW CURRENT HIGH EFFICIENCY LED |
| MUB32DH | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:ULTRA HIGH BRIGHTNESS RED LED LAMP |
| MUB32DH-5 | 制造商:MICRO-ELECTRONICS 制造商全称:Micro Electronics 功能描述:LOW CURRENT HIGH EFFICIENCY RED LED LAMP |
发布紧急采购，3分钟左右您将得到回复。