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参数资料
| 型号： | N08M1618L1AB-85I |
| 元件分类： | SRAM |
| 英文描述： | 512K X 16 STANDARD SRAM, 85 ns, PBGA48 |
| 封装： | BGA-48 |
| 文件页数： | 7/11页 |
| 文件大小： | 194K |
| 代理商： | N08M1618L1AB-85I |
Stock No. 23211-03 9/21/06
ADVANCE INFORMATION
5
The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com.
N08M1618L1A
Advance Information
AMI Semiconductor, Inc.
Timing Test Conditions
Item
Input Pulse Level
0.1VCC to 0.9 VCC
Input Rise and Fall Time
5ns
Input and Output Timing Reference Levels
0.5 VCC
Output Load
CL = 30pF
Operating Temperature
-40 to +85 oC
Timing VCCQ > or = VCC
Item
Symbol
VCC = 1.4 - 2.2 V
VCC = 1.7 - 2.2 V
Units
Min.
Max.
Min.
Max.
Read Cycle Time
tRC
150
85
ns
Address Access Time
tAA
150
85
ns
Address Access Time (Page Mode)
tAAP
30
ns
Chip Enable to Valid Output
tCO
150
85
ns
Output Enable to Valid Output
tOE
50
40
ns
Byte Select to Valid Output
tLB, tUB
150
85
ns
Chip Enable to Low-Z output
tLZ
20
10
ns
Output Enable to Low-Z Output
tOLZ
20
5
ns
Byte Select to Low-Z Output
tLBZ, tUBZ
20
10
ns
Chip Disable to High-Z Output
tHZ
0300
15
ns
Output Disable to High-Z Output
tOHZ
0300
15
ns
Byte Select Disable to High-Z Output
tLBHZ, tUBHZ
0300
15
ns
Output Hold from Address Change
tOH
20
10
ns
Write Cycle Time
tWC
150
85
ns
Chip Enable to End of Write
tCW
75
50
ns
Address Valid to End of Write
tAW
75
50
ns
Byte Select to End of Write
tLBW, tUBW
75
50
ns
Write Pulse Width
tWP
50
40
ns
Address Setup Time
tAS
00
ns
Write Recovery Time
tWR
00
ns
Write to High-Z Output
tWHZ
30
15
ns
Data to Write Time Overlap
tDW
50
40
ns
Data Hold from Write Time
tDH
00
ns
End Write to Low-Z Output
tOW
10
5
ns
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