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参数资料
| 型号： | NAND512R4A2CZB6E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55 |
| 封装： | 8 X 10 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-55 |
| 文件页数： | 15/57页 |
| 文件大小： | 916K |
| 代理商： | NAND512R4A2CZB6E |
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A
22/57
Read Memory Array
Each operation to read the memory area starts
with a pointer operation as shown in the Pointer
Operations section. Once the area (main or spare)
has been selected using the Read A, Read B or
Read C commands four bus cycles (for 512Mb
and 1Gb devices) or three bus cycles (for 128Mb
and 256Mb devices) are required to input the ad-
dress (refer to Table 6.) of the data to be read.
The device defaults to Read A mode after power-
up or a Reset operation.
When reading the spare area addresses:
■
A0 to A3 (x8 devices)
■
A0 to A2 (x16 devices)
are used to set the start address of the spare area
while addresses:
■
A4 to A7 (x8 devices)
■
A3 to A7 (x16 devices)
are ignored.
Once the Read A or Read C commands have
been issued they do not need to be reissued for
subsequent read operations as the pointer re-
mains in the respective area. However, the Read
B command is effective for only one operation,
once an operation has been executed in Area B
the pointer returns automatically to Area A and so
another Read B command is required to start an-
other read operation in Area B.
Once a read command is issued three types of op-
erations are available: Random Read, Page Read
and Sequential Row Read.
Random Read. Each time the command is is-
sued the first read is Random Read.
Page Read. After the Random Read access the
page data is transferred to the Page Buffer in a
the transfer is complete the Ready/Busy signal
goes High. The data can then be read out sequen-
tially (from selected column address to last column
address) by pulsing the Read Enable signal.
Sequential Row Read. After the data in last col-
umn of the page is output, if the Read Enable sig-
nal is pulsed and Chip Enable remains Low then
the next page is automatically loaded into the
Page Buffer and the read operation continues. A
Sequential Row Read operation can only be used
to read within a block. If the block changes a new
read command must be issued.
Refer to Figure 15. and Figure 16. for details of Se-
quential Row Read operations.
To terminate a Sequential Row Read operation set
the Chip Enable signal to High for more than tEHEL.
Sequential Row Read is not available when the
Chip Enable Don't Care option is enabled.
相关PDF资料 |
PDF描述 |
|---|---|
| NAND512R4A0BZA6 | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA63 |
| NAND512R4A0BZB6 | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55 |
| NAND512R4A0CZA6T | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA63 |
| NAND512R4A2CZB6F | 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55 |
| NAND512W3A0AN1 | 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NAND512R4A2DDI6 | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
| NAND512W3A0AN6 | 功能描述:闪存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| NAND512W3A0AN6E | 功能描述:闪存 2.7-3.6V 512M(64Mx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| NAND512W3A0AN6F | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 3V/3.3V 512MBIT 64MX8 12US 48TSOP - Tape and Reel |
| NAND512W3A0AV6E | 功能描述:IC FLASH 512MBIT 48WSOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:576 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:512M（64M x 8） 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 其它名称:497-5040 |
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