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参数资料
| 型号： | NAND512W4A3CZA1T |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 32M X 16 FLASH 3V PROM, 12000 ns, PBGA63 |
| 封装： | 8.50 X 15 MM, 1 MM HEIGHT, 0.80 MM PITCH, VFBGA-63 |
| 文件页数： | 1/5页 |
| 文件大小： | 150K |
| 代理商： | NAND512W4A3CZA1T |
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DATA BRIEFING
For further information please contact the STMicroelectronics distributor nearest to you.
FEATURES SUMMARY
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HIGH DENSITY NAND FLASH MEMORIES
– Up to 1 Gbit memory array
– Up to 32Mbit spare area
– Cost effective solutions for mass storage ap-
plications
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NAND INTERFACE
– x8 or x16 bus width
– Multiplexed Address/ Data
– Pinout compatibility for all densities
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SUPPLY VOLTAGE
– 1.8V device: VCC = 1.65 to 1.95V
– 3.0V device: VCC = 2.7 to 3.6V
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PAGE SIZE
– x8 device: (512 + 16 spare) Bytes
– x16 device: (256 + 8 spare) Words
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BLOCK SIZE
– x8 device: (16K + 512 spare) Bytes
– x16 device: (8K + 256 spare) Words
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PAGE READ / PROGRAM
– Random access: 12s (max)
– Sequential access: 50ns (min)
– Page program time: 200s (typ)
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COPY BACK PROGRAM MODE
– Fast page copy without external buffering
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CACHE PROGRAM MODE
– Internal Cache Register to improve the pro-
gram throughput
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FAST BLOCK ERASE
– Block erase time: 2ms (Typ)
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STATUS REGISTER
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ELECTRONIC SIGNATURE
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CHIP ENABLE ‘DON’T CARE’ OPTION
– Simple interface with microcontroller
Figure 1. Packages
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AUTOMATIC PAGE 0 READ AT POWER-UP
OPTION
– Boot from NAND support
– Automatic Memory Download
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SERIAL NUMBER OPTION
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HARDWARE DATA PROTECTION
– Program/Erase locked during Power transi-
tions
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DATA INTEGRITY
– 100,000 Program/Erase cycles
– 10 years Data Retention
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DEVELOPMENT TOOLS
– Error Correction Code software and hard-
ware models
– Bad Blocks Management and Wear Leveling
algorithms
– PC Demo board with simulation software
– File System OS Native reference software
– Hardware simulation models
TSOP48
12 x 20 mm
VFBGA63 8.5x15x1 mm
TFBGA63 8.5x15x1.2 mm
VFBGA63 9x11x1 mm
FBGA
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