参数资料
型号: NB4N7132DTR2G
厂商: ON Semiconductor
文件页数: 4/6页
文件大小: 0K
描述: IC SRL LINK REPLICATR HP 28TSSOP
标准包装: 2,500
类型: 链路复制器,多路复用器
PLL:
主要目的: 光纤通道,千兆位以太网,HDTV,SATA
输入: LVPECL
输出: LVPECL
电路数: 1
比率 - 输入:输出: 3:3
差分 - 输入:输出: 是/是
电源电压: 3.14 V ~ 3.47 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
NB4N7132
http://onsemi.com
4
Table 5. DC CHARACTERISTICS VDD = 3.30 V $5%, GND = 0 V; TA = 40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
VDD
Power Supply Voltage, 3.30 V $5%
3.14
3.47
V
IDD
Power Supply Current (Outputs open)
105
125
mA
PD
Power Dissipation; Outputs Open; VDD = VDDmax
450
mW
DVIN
Receiver Differential Voltage Amplitude; (IN, IN0, IN1), ACCoupled,
Internally Biased to 1.2 V;
Differential Measurement (VINn+ VINn)
300
2600
mV
DVOUT50 Output Differential Voltage Swing, peakpeak; (OUT, OUT0, OUT1)
Outputs loaded / terminated with 50 W to VDD – 2.0 V
Differential Measurement (VOUTn+ VOUTn)
1000
2200
mV
DVOUT75 Output Differential Voltage Swing, peakpeak; (OUT, OUT0, OUT1)
Outputs loaded / terminated with 75 W to VDD – 2.0 V
Differential Measurement (VOUTn+ VOUTn)
1200
2200
mV
LVCMOS/LVTTL INPUTS
VIH
Input HIGH Voltage, TTL
2.0
VDD + 0.5
V
VIL
Input LOW Voltage, TTL
0
0.8
V
IIH
Input HIGH Current, TTL; VIN = 2.4 V
100
mA
IIL
Input LOW Current, TTL; VIN = 0.5 V
100
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Table 6. AC CHARACTERISTICS VDD = 3.3 V $5%, GND = 0 V 40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
fIN / OUT
Input / Output Frequency Range
1.5
Gb/s
tr/tf
Output rise and Fall Times (Note 3)
140
175
ps
tPD
Propagation Delay, IN to OUT
0.375
4.0
ns
TDJ
Deterministic Jitter Added to Serial Input Up to 1.5 Gb/s;
K28.5$ Pattern
40
ps pkpk
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Measured 20% to 80%
Figure 4. Timing Waveforms
IN1+/
OUT+/
IN0+/
IN+/
OUT0+/
OUT1+/
tpd
tJ
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