参数资料
型号: NB6L11MMNGEVB
厂商: ON Semiconductor
文件页数: 1/9页
文件大小: 0K
描述: BOARD EVAL NB6L11MMN CLK BUFFER
标准包装: 1
主要目的: 计时,时钟分配
嵌入式:
已用 IC / 零件: NB6L11M
已供物品:
其它名称: NB6L11MMNGEVB-ND
NB6L11MMNGEVBOS
NB6L11M
2.5V / 3.3V 1:2 Differential
CML Fanout Buffer
Multi ? Level Inputs w/ Internal Termination
NB6L
11M
ALYW G
G
Q0
Q1
Q1
Description
The NB6L11M is a differential 1:2 CML fanout buffer. The
differential inputs incorporate internal 50 W termination resistors that
are accessed through the V T pins and will accept LVPECL, LVCMOS,
LVTTL, CML, or LVDS logic levels.
The V REFAC pin is an internally generated voltage supply available
to this device only. V REFAC is used as a reference voltage for
single ? ended PECL or NECL inputs. For all single ? ended input
conditions, the unused complementary differential input is connected
to V REFAC as a switching reference voltage. V REFAC may also rebias
capacitor ? coupled inputs. When used, decouple V REFAC with a
0.01 m F capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V REFAC output should be left open.
The device is housed in a small 3x3 mm 16 pin QFN package.
The NB6L11M is a member of the ECLinPS MAX t family of
high performance clock products.
Features
? Maximum Input Clock Frequency > 4 GHz, Typical
? 225 ps Typical Propagation Delay
? 70 ps Typical Rise and Fall Times
? 0.5 ps maximum RMS Clock Jitter
? Differential CML Outputs, 380 mV peak ? to ? peak, typical
? LVPECL Operating Range: V CC = 2.375 V to 3.63 V with V EE = 0 V
? NECL Operating Range: V CC = 0 V with V EE = ? 2.375 V to ? 3.63 V
? Internal Input Termination Resistors, 50 W
? VREFAC Reference Output
? Functionally Compatible with Existing 2.5 V / 3.3V LVEL, LVEP,
EP, and SG Devices
? ? 40 ° C to +85 ° C Ambient Operating Temperature
? These are Pb ? Free Devices
http://onsemi.com
MARKING
DIAGRAM*
16
1
QFN ? 16
MN SUFFIX
CASE 485G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb ? Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q0
VTD
D
D
VTD
V REFAC
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
? Semiconductor Components Industries, LLC, 2009
August, 2009 ? Rev. 4
1
Publication Order Number:
NB6L11M/D
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