参数资料
型号: NCP1015AP100G
厂商: ON Semiconductor
文件页数: 9/22页
文件大小: 0K
描述: IC OFFLINE SWIT SMPS CM 8DIP
标准包装: 1,000
输出隔离: 隔离
频率范围: 90kHz ~ 110kHz
输入电压: 8.1 V ~ 10 V
输出电压: 700V
功率(瓦特): 19W
工作温度: -40°C ~ 125°C
封装/外壳: 8-DIP(0.300",7.62mm),7 引线
供应商设备封装: 7-PDIP
包装: 管件
产品目录页面: 1127 (CN2011-ZH PDF)
其它名称: NCP1015AP100GOS
NCP1015
Tsw
1 V Ripple
Tstart
TLatch
Latch ? off
Level
Figure 15. NCP1015 Facing a Fault Condition (V in = 150 Vdc)
The rising slope from the latch ? off level up to 8.5 V is
expressed by:
Figure 16 shows a typical drain ? ground wave ? shape
where leakage effects have been removed:
t start + D V1 @ C
t sw + D V2 @ C
P DSS + V in @ ICC1
IC1
The time during which the IC actually pulses is given by:
ICC1
Vds(t)
Vin
Vr
toff
dt
Finally, the latch ? off time can be derived using the same
formula topology:
V3 @
t latch + D ICC2 C
From these three definitions, the burst duty ? cycle D can
be computed:
ton
Tsw
t
D +
t sw
t start ) t sw ) t latch
(eq. 2)
Figure 16. A Typical Drain ? ground Waveshape
where Leakage Effects are Not Accounted for
) D IC1 ) ICC2
D +
ICC1 @
D V2
ICC1
D V2 V1 D V3
(eq. 3)
By looking at Figure 16 the average result can easily be
derived by additive square area calculation:
t V DS(t) u+ V in @ (1 * D) ) V r @
t on
) V r @ off
t V DS(t) u+ V in * V in @
t off + I p @
Feeding the equation with values extracted from the
parameter section gives a typical duty ? cycle D of 13%,
precluding any lethal thermal runaway while in a fault
condition.
DSS Internal Dissipation
The Dynamic Self ? Supplied pulls the energy out from the
drain pin. In the Flyback ? based converters, this drain level
can easily go above 600 V peak and thus increase the stress
on the DSS startup source. However, the drain voltage
evolves with time and its period is small compared to that of
By developing Equation 5 we obtain:
t sw t sw
t off can be expressed by:
L p
V r
t on can be evaluated by:
t off
t sw
t
(eq. 5)
(eq. 6)
(eq. 7)
the DSS. As a result, the averaged dissipation, excluding
capacitive losses, can be derived by:
P DSS + ICC1 @t V DS(t) u
(eq. 4)
t on + I p @
L p
V in
(eq. 8)
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