参数资料
型号: NCP1234AD65R2G
厂商: ON Semiconductor
文件页数: 13/33页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 7SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 70kHz
占空比: 85%
电源电压: 9.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
包装: 带卷 (TR)
NCP1234
33% of the maximum load (for a DCM design), the
switching frequency starts to decrease down to
provide sufficient level of V CC voltage under this
condition.
?
f OSC(min) . By lowering the switching losses, this feature
helps to improve the efficiency in light load conditions.
The frequency jittering is enabled in light load
operation as well.
No load operation : When the FB voltage decreases
below V skip(in) , typically corresponding to a load of 2%
of the maximum load, the controller enters skip mode.
By completely stopping the switching while the
feedback voltage is below V skip(out) , the losses are
further reduced. This allows minimizing the power
dissipation under extremely low load conditions. As the
skip mode is entered at very light loads, for which the
peak current is very small, there is no risk of audible
noise. V CC can be maintained between V CC(on) and
V CC(min) by the DSS, if the auxiliary winding does not
?
?
Overload : The NCP1234 features timer ? based
overload detection, solely dependent on the feedback
information: as soon as the internal peak current
setpoint hits the V ILIM clamp, an internal timer starts to
count. When the timer elapses, the controller stops and
enter the protection mode, autorecovery for the B
version (the controller initiates a new start ? up after
t autorec elapses), or latched for the A version (the latch
is released only if V CC is reset).
Latch ? off : When the Latch input is pulled up (typically
by an over ? voltage condition), or pulled down
(typically by an over ? temperature condition, using the
provided current source with an NTC), the controller
latches off. The latch is released when the V CC is reset.
http://onsemi.com
13
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