参数资料
型号: NCP1234BD100R2G
厂商: ON Semiconductor
文件页数: 18/33页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 7SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 108kHz
占空比: 85%
电源电压: 9.5 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
包装: 带卷 (TR)
NCP1234
CURRENT ? MODE CONTROL WITH OVERPOWER COMPENSATION AND SOFT ? START
Current sensing
NCP1234 is a current ? mode controller, which means that
the FB voltage sets the peak current flowing in the
inductance and the MOSFET. This is done through a PWM
comparator: the current is sensed across a resistor and the
resulting voltage is applied to the CS pin. It is applied to one
V FB(ref)
input of the PWM comparator through a 250 ns LEB block.
On the other input the FB voltage divided by 5 sets the
threshold: when the voltage ramp reaches this threshold, the
output driver is turned off.
The maximum value for the current sense is 0.7 V, and it
is set by a dedicated comparator.
R FB(up)
K FB
+
?
PWM
Soft ? start
+
Jitter
?
Soft ? start ramp
Oscillator
FB
t SSTART
Start
Reset
IC Start
CS
blanking
t LEB
+
+
?
IC Stop
S
Q
R
DRV Stage
V ILIM
IC stop
blanking
t BCS
+
?
+
Protection
Mode
UVLO
Latch
V CS(stop)
Fault
Figure 32. Current Sense Block Schematic
TSD
Each time the controller is starting, i.e. the controller was
off and starts – or restarts – when V CC reaches V CC(on) , a
soft ? start is applied: the current sense setpoint is linearly
increased from 0 (the minimum level can be higher than 0
because of the LEB and propagation delay) until it reaches
V ILIM (after a duration of t SSTART ), or until the FB loop
imposes a setpoint lower than the one imposed by the
soft ? start (the 2 comparators outputs are OR’ed). The
soft ? start ramp signal is generated by the D/A converter in
the NCP1234, that’s why there are observable 15 discrete
steps instead the truly linearly increasing current setpoint
ramp.
http://onsemi.com
18
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