参数资料
型号: NCP1236AD100R2G
厂商: ON Semiconductor
文件页数: 14/34页
文件大小: 0K
描述: IC CTLR CURR MODE 100KHZ 7-SOIC
标准包装: 1
输出隔离: 隔离
频率范围: 92kHz ~ 108kHz
输入电压: 10.5 V ~ 28 V
输出电压: 28V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
供应商设备封装: 7-SOIC
包装: 标准包装
其它名称: NCP1236AD100R2GOSDKR
NCP1236
Typical Operation
? Start ? up : The HV start ? up current source ensures the
charging of the V CC capacitor up to the start ? up
threshold V CC(on) , until the input voltage is high
enough (above V HV(start) ) to allow the switching to
start. The controller then delivers pulses, starting with a
soft ? start period t SSTART during which the peak current
linearly increases before the current ? mode control takes
further reduced. This allows minimizing the power
dissipation under extremely low load conditions. As the
skip mode is entered at very light loads, for which the
peak current is very small, there is no risk of audible
noise. V CC can be maintained between V CC(on) and
V CC(min) by the DSS, if the auxiliary winding does not
provide sufficient level of V CC voltage under this
condition.
over. During the soft ? start period, the low level latch is
ignored, and the latch current is double, to ensure a fast
pre ? charge of the Latch pin decoupling capacitor.
?
Overload : The NCP1236 features timer ? based
overload detection, solely dependent on the feedback
information: as soon as the internal peak current
?
?
?
Normal operation : As long as the feedback voltage is
within the regulation range and V CC is maintained
above V CC(min) , the NCP1236 runs at a fixed frequency
(with jittering) in current ? mode control. The peak
current (sensed on the CS pin) is set by the voltage on
the FB pin. Fixed ramp compensation is applied
internally to prevent sub ? harmonic oscillations from
occurring.
Light load operation : When the FB voltage decreases
below V FB(foldS) , typically corresponding to a load of
33 % of the maximum load (for a DCM design), the
switching frequency starts to decrease down to
f OSC(min) . By lowering the switching losses, this feature
helps to improve the efficiency in light load conditions.
The frequency jittering is enabled in light load
operation as well.
No load operation : When the FB voltage decreases
below V skip(in) , typically corresponding to a load of 2
% of the maximum load, the controller enters skip
mode. By completely stopping the switching while the
feedback voltage is below V skip(out) , the losses are
?
?
setpoint hits the V ILIM clamp, an internal timer starts to
count. When the timer elapses, the controller stops and
enter the protection mode, autorecovery for the B
version (the controller initiates a new start ? up after
t autorec elapses), or latched for the A version (the latch
is released if a brown ? out event occurs or V CC is reset).
Brown ? out : The NCP1236 features a true AC line
monitoring circuitry. It includes a minimum start ? up
threshold and an autorecovery brown ? out protection;
both of them independent of the ripple on the input
voltage. It can even work with an unfiltered, rectified
AC input. The thresholds are fixed, but they are
designed to fit most of the standard AC ? DC conversion
applications.
Latch ? off : When the Latch input is pulled up (typically
by an over ? voltage condition), or pulled down
(typically by an over ? temperature condition, using the
provided current source with an NTC), the controller
latches off. A voltage higher than V CC(ovp) on the VCC
pin has the same effect. The latch is released when a
brown ? out condition occurs, or when the V CC is reset.
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