参数资料
型号: NCP1236AD100R2G
厂商: ON Semiconductor
文件页数: 4/34页
文件大小: 0K
描述: IC CTLR CURR MODE 100KHZ 7-SOIC
标准包装: 1
输出隔离: 隔离
频率范围: 92kHz ~ 108kHz
输入电压: 10.5 V ~ 28 V
输出电压: 28V
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
供应商设备封装: 7-SOIC
包装: 标准包装
其它名称: NCP1236AD100R2GOSDKR
NCP1236
MAXIMUM RATINGS
Rating
Supply Pin (pin 6) (Note 2)
Voltage range
Current range
High Voltage Pin (pin 8) (Note 2)
Voltage range
Current range
Driver Pin (pin 5) (Note 2)
Voltage range
Current range
All other pins (Note 2)
Voltage range
Current range
Thermal Resistance SOIC ? 7
Junction ? to ? Air, low conductivity PCB (Note 3)
Junction ? to ? Air, medium conductivity PCB (Note 4)
Junction ? to ? Air, high conductivity PCB (Note 5)
Temperature Range
Operating Junction Temperature
Storage Temperature Range
ESD Capability (Note 1)
Human Body Model (All pins except HV)
Machine Model
Symbol
V CCMAX
I CCMAX
V HVMAX
I HVMAX
V DRVMAX
I DRVMAX
V MAX
I MAX
R ? J ? A
T JMAX
T STRGMAX
Value
–0.3 to 28
$ 30
–0.3 to 500
$ 20
–0.3 to 20
$ 1000
–0.3 to 10
$ 10
162
147
115
? 40 to +150
? 60 to +150
2000
200
Unit
V
mA
V
mA
V
mA
V
mA
? C/W
? C
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC standard JESD22, Method A114E
Machine Model Method 200 V per JEDEC standard JESD22, Method A115A
2. This device contains latch ? up protection and exceeds 100 mA per JEDEC Standard JESD78
3. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 50 mm 2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 ? 1 conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 100 mm 2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 ? 2 conductivity test PCB. Test conditions were under natural convection or zero air flow.
5. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 650 mm 2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 ? 3 conductivity test PCB. Test conditions were under natural convection or zero air flow.
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