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参数资料
| 型号： | NCP1238AD65R2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 33/38页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBACK PWM 7SOIC |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 70kHz |
| 占空比： | 85% |
| 电源电压： | 9.5 V ~ 28 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽）7 引线 |
| 包装： | 标准包装 |
| 其它名称： | NCP1238AD65R2GOSDKR |
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NCP1238
Latch ? off Input
VDD
I NTC
+
+
?
V OVP
blanking
t Latch(OVP)
I NTC
Latch
1 k W
+
?
+
V OTP
blanking
t Latch(OTP)
S
Q
R
Latch
V clamp
Brown ? out
Reset
Soft ? start
end
Figure 62. Latch Detection Schematic
The Latch pin is dedicated to the latch ? off function. It
includes two thresholds that define a working window,
between a high latch and a low latch. Within these 2
thresholds; the controller is allowed to run; but as soon as
either the low or the high threshold is crossed, the controller
is latched off. The lower threshold is intended to be used
with an NTC thermistor, with the internal current source
I NTC providing the necessary bias current.
An active clamp prevents the voltage from reaching the
high threshold if it is only pulled up by the I Latch current. To
reach the high threshold, the pullup current has to be higher
than the pulldown capability of the clamp (typically 1.5 mA
at V OVP ).
To avoid any false triggering, noise spikes shorter than
t Latch(OVP) or t Latch(OTP) respectively are blanked, and only
longer events can actually latch the controller.
Reset occurs when a brown ? out condition is detected or
the V CC is cycled down to a V CC(reset) , which in a real
application can only happen if the power supply is
unplugged from the AC line.
Upon startup, the internal references take some time
before reaching their nominal values; and one of the
comparators could toggle inadvertantly. Therefore the
internal logic ignores the latch signal before the controller is
ready to start. Once V CC reaches V CC(on) , the latch pin High
latch state is enabled and the DRV switching starts only if it
is allowed; whereas the Low latch (typically sensing an
overtemperature) is taken into account only after the
soft ? start is finished. In addition, the NTC current is doubled
during the soft ? start period, to speed up the charging of the
Latch pin capacitor.
http://onsemi.com
33
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