参数资料
型号: NCP1397ADR2G
厂商: ON Semiconductor
文件页数: 16/27页
文件大小: 0K
描述: IC REG CTRLR ISO PWM 16-SOIC
标准包装: 2,500
PWM 型: 控制器
输出数: 1
频率 - 最大: 560kHz
占空比: 52%
电源电压: 10.3 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)15 引线
包装: 带卷 (TR)
NCP1397A, NCP1397B
Fstart(adj) ? RFstart/RFmin
Fmin(adj) ? RFmin
Fmax(adj) ? Rc + Rskip1 + Rskip2
RFstart
SS
Fmax
Rt
RFmin
CSS
OK1
Rc
Rskip1
VCC
FB
GND
Skip/Disable
NCP1397
Rskip2
Figure 34. Feedback Configuration Using Direct Connection to the Rt Pin
Rbias
Fstart(adj) ? RFstart/RFmin
Fmin(adj) ? RFmin
Fmax(adj) ? Rc + Rskip1 + Rskip2
RFstart
SS
Fmax
Rt
RFmin
CSS
OK1
Rc
Rskip1
Rskip2
1N4148
VCC
FB
GND
Skip/Disable
NCP1397
Figure 35. Feedback Configuration Using Direct Connection to the Rt Pin – No Open FB Loop Detection
Dead ? Time Control
Deadtime control is an absolute necessity when the
half ? bridge configuration comes to play. The deadtime
technique consists in inserting a period during which both
high and low side switches are off. Of course, the deadtime
amount differs depending on the switching frequency, hence
the ability to adjust it on this controller. The option ranges
between 100 ns and 2 m s. The deadtime is actually made by
controlling the oscillator discharge current. Figure 36
portrays a simplified VCO circuit based on Figure 25.
During the discharge time, the clock comparator is high and
invalidates the AND gates: both outputs are low. When the
comparator goes back to the low level, during the timing
capacitor Ct recharge time, A and B outputs are validated.
By connecting a resistor R DT to ground, it creates a current
whose image serves to discharge the Ct capacitor: we control
the dead ? time. The typical range evolves between 100 ns
(R DT = 3.5 k W ) and 2 m s (R DT = 83.5 k W ). Figure 39 shows
the typical waveforms.
http://onsemi.com
16
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