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参数资料
| 型号： | NCP1529MUTBGEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR NCP1529MUTBG |
| 设计资源： | NCP1529MUTBGEVB BOM NCP1529MUTBGEVB Gerber Files NCP1529MUTBGEVB Schematic |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 0.9 V ~ 3.9 V |
| 电流 - 输出： | 1A |
| 输入电压： | 3.6V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 1.7MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | NCP1529 |
| 其它名称： | NCP1529MUTBGEVBOS |
NCP1529
MAXIMUM RATINGS
Rating
Minimum Voltage All Pins
Maximum Voltage All Pins (Note 2)
Maximum Voltage EN
Thermal Resistance, Junction ? to ? Air (TSOP ? 5 Package)
Thermal Resistance using TSOP ? 5 Recommended Board Layout (Note 9)
Thermal Resistance, Junction ? to ? Air (UDFN6 Package)
Thermal Resistance using UDFN6 Recommended Board Layout (Note 9)
Operating Ambient Temperature Range (Notes 7 and 8)
Storage Temperature Range
Junction Operating Temperature (Notes 7 and 8)
Latchup Current Maximum Rating (T A = 85 ° C) (Note 5) Other Pins
ESD Withstand Voltage (Note 4)
Human Body Model
Machine Model
Moisture Sensitivity Level (Note 6)
Symbol
V min
V max
V max
R q JA
R q JA
T A
T stg
T j
Lu
V esd
MSL
Value
? 0.3
7.0
V IN + 0.3
300
110
220
40
? 40 to 85
? 55 to 150
? 40 to 150
$ 100
2.0
200
1
Unit
V
V
V
° C/W
° C/W
° C
° C
° C
mA
kV
V
per IPC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T A = 25 ° C.
3. According to JEDEC standard JESD22 ? A108B.
4. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) per JEDEC standard: JESD22 ? A114.
Machine Model (MM) per JEDEC standard: JESD22 ? A115.
5. Latchup current maximum rating per JEDEC standard: JESD78.
6. JEDEC Standard: J ? STD ? 020A.
7. In applications with high power dissipation (low V IN , high I OUT ), special care must be paid to thermal dissipation issues. Board design
considerations ? thermal dissipation vias, traces or planes and PCB material ? can significantly improve junction to air thermal resistance
R q JA (for more information, see design and layout consideration section). Environmental conditions such as ambient temperature T A brings
thermal limitation on maximum power dissipation allowed.
The following formula gives calculation of maximum ambient temperature allowed by the application:
T A MAX = T J MAX ? (R q JA x P d )
Where: T J is the junction temperature,
P d is the maximum power dissipated by the device (worst case of the application),
and R q JA is the junction ? to ? ambient thermal resistance.
8. To prevent permanent thermal damages, this device include a thermal shutdown which engages at 180 ° C (typ).
9. Board recommended TSOP ? 5 and UDFN6 layouts are described on Layout Considerations section.
1200
1200
1000
800
600
400
200
UDFN6
TSOP ? 5
1000
800
600
400
200
UDFN6
TSOP ? 5
0
? 40
? 20
0
20
40
60
80
0
2.7
3.2
3.7 4.2 4.7
5.2
T A , AMBIENT TEMPERATURE ( ° C)
Figure 8. Power Derating
V IN , INPUT VOLTAGE (V)
Figure 7. Maximum Output Current, T A = 45 5 C
http://onsemi.com
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