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参数资料
| 型号： | NCP1547MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/15页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 1.5A 18DFN |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.5 V ~ 24 V |
| 输入电压： | 4.5 V ~ 40 V |
| PWM 型： | 混合物 |
| 频率 - 开关： | 340kHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 18-VFDFN 裸露焊盘 |
| 包装： | 剪切带 (CT) |
| 供应商设备封装： | 18-DFN（5x6） |
| 其它名称： | NCP1547MNR2GOSCT |
NCP1547
102.5
100
97.5
95
92.5
90
? 40 ? 20 0 20 40 60 80 100 120 140
T J , JUNCTION TEMPERATURE ( ° C)
Figure 4. Oscillator Frequency Versus Junction
Temperature
An external clock signal can sync the NCP1547 to a higher
frequency. The SYNC pin equivalent input circuit is shown
in Figure 5.
Power Switch and Current Limit
The collector of the built ? in NPN power switch is
connected to the V IN pin, and the emitter to the V SW pin.
When the switch turns on, the V SW voltage is equal to the
V IN minus switch Saturation Voltage. In the buck regulator,
the V SW voltage swings to one diode drop below ground
when the power switch turns off, and the inductor current is
commutated to the catch diode. Due to the presence of high
pulsed current, the traces connecting the V SW pin, inductor
and diode should be kept as short as possible to minimize the
noise and radiation. For the same reason, the input capacitor
should be placed close to the V IN pin and the anode of the
diode.
The saturation voltage of the power switch is dependent
on the switching current, as shown in Figure 7.
0.7
0.6
0.5
Sync
10k
± 33%
V Z = 11V
to 20V
50k
± 33%
50k
± 33%
0.4
0.3
0.2
IO(MAX) + ILIM * O
GND
Figure 5.
The rising edge of the sync pulse turns on the power
switch to start a new switching cycle, as shown in Figure 6.
There is approximately 0.5 m s delay between the rising edge
of the sync pulse and rising edge of the V SW pin voltage. The
sync threshold is TTL logic compatible, and duty cycle of
the sync pulses can vary from 10% to 90%. The frequency
foldback feature is disabled during the sync mode.
Figure 6. A NCP1547 Buck Regulator is
Synchronized to an External 443 kHz Pulse Signal
0.1
0
0 0.5 1.0 1.5
SWITCHING CURRENT (A)
Figure 7. The Saturation Voltage of the Power Switch
Increases with the Conducting Current
The NCP1547 contains pulse ? by ? pulse current limiting
to protect the power switch and external components. When
the peak of the switching current reaches the Current Limit,
the power switch turns off after the Current Limit Delay. The
switch will not turn on until the next switching cycle. The
current limit threshold is independent of switching duty
cycle. The maximum load current, given by the following
formula under continuous conduction mode, is less than the
Current Limit due to the ripple current.
V (VIN * VO)
2(L)(VIN)(fs)
where:
f S = switching frequency,
I LIM = current limit threshold,
V O = output voltage,
V IN = input voltage,
L = inductor value.
When the regulator runs under current limit, the
subharmonic oscillation may cause low frequency
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