参数资料
型号: NCP1562ADBR2G
厂商: ON Semiconductor
文件页数: 15/26页
文件大小: 0K
描述: IC REG CTRLR PWM VM 16-TSSOP
标准包装: 1
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1MHz
占空比: 85%
电源电压: 23.2 V ~ 100 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 剪切带 (CT)
其它名称: NCP1562ADBR2GOSCT
NCP1562A, NCP1562B
DETAILED OPERATING DESCRIPTION
The NCP1562x is a family of voltage mode controllers
designed for dc-- dc converters requiring high-- efficiency
and low parts count. These controllers incorporate two in
phase outputs with an adjustable overlap delay. The main
output is designed for driving a forward converter primary
MOSFET. The secondary output is designed for driving an
active clamp circuit MOSFET, a synchronous rectifier on
the secondary side, or an asymmetric half bridge circuit.
Two distinctive features of the NCP1562 are the
soft-- stop and a cycle skip overcurrent detector with a time
threshold. The soft-- stop powers down the converter in a
controlled manner after a fault is detected. The cycle skip
timer disables the converter if a continuous overcurrent
condition is present.
The NCP1562 reduces component count and system size
by incorporating high accuracy on critical specifications
such as programmable maximum duty cycle, undervoltage
detector and overcurrent threshold. Additional features
found in the NCP1562 include line feedforward,
bidirectional frequency synchronization up to 1.0 MHz,
cycle-- by-- cycle current limit with leading edge blanking
(LEB), independent under and overvoltage detectors,
internal startup circuit and soft-- start.
SOFT--STOP AND SOFT--START
The NCP1562 incorporates a novel soft-- stop and
current does not exceed 100 m A. Otherwise the converter
will not be able to complete a soft-- stop sequence.
Depending on the converter state, a soft-- stop sequence
is handled differently to ensure the fastest response time
and prevent system malfunction. If a soft-- stop sequence
starts before V SS exceeds the maximum voltage clamp of
the FF Ramp (typ. 3.0 V) and the PWM Comparator (V EA )
is not yet controlling the duty cycle, a controlled discharge
of C SS commences immediately, as shown in Figure 34.
However, if V EA is controlling the duty cycle, C SS is
discharged until soft-- stop sets a duty cycle equal to the duty
cycle set by V EA . A controlled discharge commences
afterwards, as shown in Figure 35. If V SS exceeds the FF
Ramp and the V EA is not controlling the duty cycle, V SS is
forced to the peak voltage of the FF Ramp, before starting
a controlled discharge of C SS , as shown in Figure 36. The
duty cycle set at the beginning of the soft-- stop event never
exceeds the duty cycle prior to the soft-- stop event.
(V EA is not controlling the duty cycle)
V EA
soft-- start architecture that combines soft-- start and
soft-- stop functions on a single pin.
Soft-- stop reduces the duty cycle until it reaches 0% once
a fault is detected. By slowly reducing the duty cycle during
power down, the active clamp capacitor (C clamp ) is
discharged. This prevents oscillations between the power
transformer and C clamp , and ensures the converter turns off
in a predictable state.
V SS
FF Ramp
Soft-- start slowly increases the duty cycle during power
up allowing the controller to gradually reach steady state
operation. Combined, both features reduce system stress
and power surges.
The duty cycle is controlled by comparing the SS
capacitor voltage (V SS ) to the Feedforward (FF) Ramp.
Soft-- start or soft-- stop is implemented by slowly charging
Figure 34. Soft--Stop Before Soft--Start
is Complete and V EA is Open.
or discharging the capacitor on the SS pin. OUT1 is
disabled once the FF Ramp exceeds V SS . The soft-- start
charge current is 10 m A and the soft-- stop discharge current
is 100 m A, guaranteeing a faster turn OFF time.
The converter enters a soft-- stop sequence if an
undervoltage, overvoltage, cycle skip or thermal shutdown
condition is detected. Once the converter enters the
soft-- stop mode, it will stay in soft-- stop mode until V SS
reaches 0.2 V even if the fault is removed prior to reaching
0.2 V.
V SS
V EA
V X = V EA -- V f
The preset 1:10 charge:discharge ratio can be reduced by
placing an external resistor between the V REF and SS pins.
The resistor should be sized such that the total charge
http://onsemi.com
15
Figure 35. Soft--Stop Behavior when V EA
Controls the Duty Cycle.
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