参数资料
型号: NCP1571D
厂商: ON Semiconductor
文件页数: 14/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 8-SOIC
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 98
PWM 型: 电流/电压模式,V²?
输出数: 1
频率 - 最大: 250kHz
电源电压: 11.4 V ~ 12.6 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
NCP1571
Layout Considerations
1. The fast response time of V 2 technology increases
the IC’s sensitivity to noise on the V FB line.
V OUT
R4
R6
C6
Fortunately, a simple RC filter, formed by the
feedback network and a small capacitor (100 pF
works well, shown below as C6) placed between
V FB and GND, filters out most noise and provides a
system practically immune to jitter. This capacitor
should be located as close as possible to the IC.
2. The COMP capacitor (shown below as C13)
C4
R3
U1
C13
C12
should be connected via its own path to the IC
ground. The COMP capacitor is sensitive to the
intermittent ground drops caused by switching
currents. A separate ground path will reduce the
potential for jitter.
GND
12 V PWRGD
Figure 25.
R1
5V
3. The V CC bypass capacitor (0.1 m F or greater,
shown below as C4) should be located as close as
possible to the IC. This capacitor ’s connection to
GND must be as short as possible. The 10 W
resistor (shown below as R3) should be placed
close to the V CC pin.
4. The IC should not be placed in the path of
switching currents. If a ground plane is used, care
should be taken by the designer to ensure that the
IC is not located over a ground or other current
return path.
http://onsemi.com
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