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| 型号： | NCP1603D100R2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 22/30页 |
| 文件大小： | 302K |
| 描述： | IC CTLR PFC/PWM COMBO 16-SOIC |
| 产品变化通告： | Product Discontinuation 21/Jun/2007 |
| 标准包装： | 2,500 |
| 模式： | 临界传导（CRM），间歇导电（DCM） |
| 频率 - 开关： | 58kHz |
| 电流 - 启动： | 17µA |
| 电源电压： | 9 V ~ 18 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
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NCP1603
http://onsemi.com
22
DCM needs higher peak inductor current comparing to
CRM in the same averaged input current. Hence, CRM is
generally preferred at around the sinusoidal peak for lower
the maximum current stress but DCM is also preferred at
the nonpeak region to avoid excessive switching
frequencies. Because of the variablefrequency feature of
the CRM and constantfrequency feature of DCM,
switching frequency is the maximum in the DCM region
and hence the minimum switching frequency will be found
at the moment of the sinusoidal peak.
DCM PFC Circuit
A DCM/CRM PFC boost converter is shown in
Figure 58. Input voltage is a rectified 50 or 60 Hz
sinusoidal signal. The MOSFET is switching at a high
frequency (typically around 100 kHz) so that the inductor
current I
L
basically consists of highfrequency and
lowfrequency components.
Figure 58. DCM/CRM PFC Boost Converter
V
in
I
in
I
L
L
V
out
C
bulk
C
filter
Filter capacitor C
filter
is an essential and very small value
capacitor in order to eliminate the highfrequency content
of the DCM inductor current I
L
. This filter capacitor cannot
be too bulky because it can pollute the power factor by
distorting of the rectified sinusoidal input voltage.
PFC Methodology
The PFC section uses a proprietary PFC methodology
particularly designed for both DCM and CRM operation.
The PFC methodology is described in this section.
Figure 59. Inductor Current in DCM
t
1
t
2
t
3
I
pk
T
time
Inductor Current
As shown in Figure 59, the inductor current I
L
of each
switching cycle starts from zero in DCM. CRM is a special
case of DCM when t
3
= 0. When the PFC boost converter
MOSFET is on, the inductor current I
L
increases from zero
to I
pk
for a time duration t
1
with inductance L and input
voltage V
in
. Equation 3 is formulated.
V
in
+ L
I
pk
t
1
(eq. 3)
The input filter capacitor C
filter
and the frontended EMI
filter absorb the highfrequency component of inductor
current. It makes the input current I
in
a lowfrequency
signal.
I
in
+
I
pk
(t
1
) t
2
)
2 T
for DCM
(eq. 4)
I
in
+
I
pk
2
for CRM
(eq. 5)
From Equations 3, 4, and 5, the input impedance Z
in
is
formulated.
Z
in
+
V
in
I
in
+
2TL
t
1
(t
1
) t
2
)
for DCM
(eq. 6)
Z
in
+
V
in
I
in
+
2L
t
1
for CRM
(eq. 7)
Power factor is corrected when the input impedance Z
in
in Equations 6 and 7 are constant or slowly varying.
Figure 60. PFC Modulation Circuit and Timing
Diagram
+
closed when
output low
Turns off
MOSFET
Ramp
12
C
ramp
I
ch
V
ton
V
ton
ramp
out1
PWM
Comparator
The MOSFET on time t
1
of PFC modulation duty is
generated by a feedback signal V
ton
and a ramp. The PFC
modulation circuit and timing diagram are shown in
Figure 60. A relationship in Equation 8 is obtained.
t
1
+
C
ramp
V
ton
I
ch
(eq. 8)
The charging current I
ch
is constant 100 mA current and
the ramp capacitor C
ramp
is constant for a particular design.
Hence, according to Equation 8, the MOSFET on time t
1
is proportional to V
ton
.
In order to protect the PFC modulation comparator, the
maximum voltage of V
ton
is limited to internal clamp
V
ton(max)
(3.9 V typical) and the ramp pin (Pin 12) is with
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