参数资料
型号: NCP346SN1EVB
厂商: ON Semiconductor
文件页数: 2/15页
文件大小: 0K
描述: EVAL BOARD FOR NCP346SN1
产品变化通告: Product Obsolescence 21/Jan/2010
设计资源: NCP346SN1 Demo Brd BOM
NCP346SN1EVB Gerber Files
NCP346SN1 Demo Brd Schematic
标准包装: 1
主要目的: 过压防护
嵌入式:
已用 IC / 零件: NCP346
已供物品:
其它名称: NCP346SN1EVBOS
NCP346
V CC
(5)
IN
(4)
V CC
V5
Pre?regulator
R1
?
+
COMP
LOGIC
BLOCK
V CC
ON/OFF OUT
DRIVER
OUT
(1)
R2
Bandgap
Reference
CNTRL
(3)
GND
(2)
Figure 2. Detailed Block Diagram
PIN FUNCTION DESCRIPTIONS
Pin #
1
2
3
4
5
Symbol
OUT
GND
CNTRL
IN
V CC
Pin Description
This signal drives the gate of a P?channel MOSFET. It is controlled by the voltage level on IN or the logic state of
the CNTRL input. When an overvoltage event is detected, the OUT pin is driven to within 1.0 V of V CC in less
than 1.0 m sec provided that gate and stray capacitance is less than 12 nF.
Circuit Ground
This logic signal is used to control the state of OUT and turn?on/off the P?channel MOSFET. A logic High results
in the OUT signal being driven to within 1.0 V of V CC which disconnects the FET. The input is tied Low via an
internal 50 k W pull?down resistor. It is recommended that the input be connected to GND if it is not used.
This pin senses an external voltage point. If the voltage on this input rises above the overvoltage threshold (V th ),
the OUT pin will be driven to within 1.0 V of V CC , thus disconnecting the FET. The nominal threshold level can be
increased with the addition of an external resistor divider between IN, V CC , and GND.
Positive Voltage supply. OUT is guaranteed to be in low state (MOSFET ON) as long as V CC remains above
2.5 V, and below the overvoltage threshold.
TRUTH TABLE
IN
<V th
<V th
>V th
>V th
CNTRL
L
H
L
H
OUT
GND
V CC
V CC
V CC
http://onsemi.com
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