参数资料
型号: NCP51460SN33T1G
厂商: ON Semiconductor
文件页数: 8/11页
文件大小: 0K
描述: IC VREF SERIES PREC 3.3V SOT23-3
标准包装: 1
基准类型: 串联,精度
输出电压: 3.3V
容差: ±1%
温度系数: 标准值 18ppm/°C
输入电压: 4.2 V ~ 28 V
通道数: 1
电流 - 静态: 220µA
电流 - 输出: 20mA
工作温度: 0°C ~ 100°C
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: SOT-23-3(TO-236)
包装: 标准包装
其它名称: NCP51460SN33T1GOSDKR
NCP51460
APPLICATIONS INFORMATION
Input Decoupling Capacitor (C IN )
It is recommended to connect a 0.1 m F Ceramic capacitor
between V IN and GND pin of the device. This capacitor will
provide a low impedance path for unwanted AC signals or
noise present on the input voltage. The input capacitor will
also limit the influence of input trace inductances and Power
Supply resistance during sudden load current changes.
Higher capacitances will improve the Power Supply
Rejection Ratio and line transient response.
3.35
3.30
3.25
3.35
3.30
3.25
V OUT
C OUT = 1 m F MLCC + 2 W
C OUT = 1 m F MLCC
Output Decoupling Capacitor (C OUT )
The NCP51460 was designed to be stable without an
additional output capacitor. Without the output capacitor the
V OUT settling times during Reference Turn ? on or Turn ? off
can be as short as 20 m s (Refer to Figure 24 and 25). The
Load Transient Responses without C OUT (Figure 21 and 22)
show good stability of NCP51460 even for fast output
current changes from 0 mA to full load. If smaller V OUT
deviations during load current changes are required, it is
possible to add some external capacitance as shown on
Figure 26.
I OUT = 10 mA
V IN = 5.8 V, T A = 25 ° C,
t rise_fall = 10 mA/1 m s
I OUT = 0 mA
TIME (50 m s/DIV)
Figure 27.
The device was determined to be stable with Aluminum,
Ceramic and Tantalum Capacitors with capacitances
ranging from 0 to 100 m F at T A = 25 ° C.
Turn ? On Response
V IN = 4.2 to 28 V
C IN
0.1 m F
V IN V OUT
NCP51460
(3.3 V fixed)
GND
C OUT
V OUT
3.3 V
It is possible to achieve very fast Turn ? On time when fast
V IN ramp is applied to NCP51460 input as shown on
Figure 24. However if the Input Voltage change from 0 V to
nominal Input Voltage is extremely fast, the Output Voltage
settling time will increase. Figure 28 below shows this effect
when the Input Voltage change is 5.8 V / 2 m s.
Figure 26. Output Capacitor Connection
The C OUT will reduce the overshoot and undershoot but
will increase the settling time and can introduce some
ringing of the output voltage during fast load transients.
NCP51460 behavior for different values of ceramic X7R
output capacitors is depicted on Figure 23.
The Output Voltage ringing and settling times can be
6
4
2
0
V IN
reduced by using some additional resistance in series with
the Ceramic Capacitor or by using Tantalum or Aluminum
Capacitors which have higher ESR values. Figure 27 below
shows the Load Transient improvement after adding an
additional 2 W series resistor to a 1 m F Ceramics Capacitor.
3
2
1
0
V OUT
V IN = 0 V to 5.8 V,
C IN = 0 m F,
C OUT = 0 m F,
I OUT = 0 mA, T A = 25 ° C,
t rise = 45 m s
TIME (10 m s/DIV)
Figure 28.
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