参数资料
| 型号： | NCP5201MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/9页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWR DDR DUAL 5X6 18-DFN |
| 产品变化通告： | Product Discontinuation 01/Oct/2008 |
| 标准包装： | 2,500 |
| 应用： | 控制器，DDR |
| 输入电压： | 9.2 V ~ 12 V |
| 输出数： | 2 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 18-VFDFN 裸露焊盘 |
| 供应商设备封装： | 18-DFN（5x6） |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP5201MNR2GOS |
NCP5201
ELECTRICAL CHARACTERISTICS (VSTBY = 5.0 V, VCC = 12 V, T A = 0 to 70 ° C, L2 = 1.7 m H, COUT = 3770 m F, COUT2 = 220 m F,
RL1 = 100 k W , R7 = 1.0 k W , R10 = 1.0 k, R12 = 20 k W , R6 = 16 W , C12 = 3.0 nF, C11 = 6.0 nF, C10 = 80 nF, for min/max values unless
otherwise noted)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
SUPPLY CURRENT
S0 Mode Supply Current from VSTBY
S3 Mode Supply Current from VSTBY
S0 Mode Supply Current from VCC
IST_S0
IST_S3
ICC_S0
S3_EN = LOW, VCC = 12 V
S3_EN = HIGH, VCC = 0 V
EN = HIGH, VCC = 12 V,
?
?
?
?
?
?
8.0
4.0
30
mA
mA
mA
2.0 nF Capacitive Load to TGDDQ
and BGDDQ
UNDERVOLTAGE MONITOR
VSTBY UVLO Lower Threshold
Ratio of VSTBY UVLO Upper to
VSBUV?
VSBUV+/
?
?
?
?
4.25
1.05
?
?
V
?
Lower Threshold
VSBUV?
VCC UV Monitor Lower Threshold
Ratio of VCC UV Monitor Upper to
VCCUV?
VCCUV+/
?
?
?
?
9.23
1.14
?
?
V
?
Lower Threshold
VDDQ SWITCHING REGULATOR
VCCUV?
FBDDQ Feedback Voltage,
Control Loop in Regulation
Feedback Input Current
Oscillator Frequency in S0 Mode
OCDDQ Pin Current Sink
Minimum Duty Cycle
Maximum Duty Cycle
Soft?Start Timing
VFBQ
Ifb
F
IOC
Dmin
Dmax
tss1
T A = 25 ° C
T A = 0 to 70 ° C
V(FBDDQ) = 1.3 V
?
V(OCDDQ) = 4.0 V
?
?
C SS = 33 nF
1.271
1.264
?
225
6.0
0
?
10
1.300
?
?
250
10
?
?
16
1.326
1.333
0.5
275
14
?
100
?
V
V
m A
kHz
m A
%
%
ms
VDDQ STANDBY REGULATOR
FBDDQ Feedback Voltage, Control
Loop in Regulation
Load Regulation
Peak Current Limit
Peak Current Limit Blanking Time
Oscillator Frequency in S3 Mode
VFBQ
LOADreg
ILIMstbpk
tbk
Fstb
T A = 25 ° C
T A = 0 to 70 ° C
ILOAD from 50 mA to 650 mA
?
?
?
1.281
1.274
?
?
400
?
1.300
?
0.4
2.0
?
500
1.319
1.326
?
?
?
?
V
V
%
A
ns
kHz
VDDQ ERROR AMPLIFIER
DC Gain
Unity Gain Bandwidth
GAIN
Ft
?
COMP_GND = 200 nF, 1.0 W in
?
?
70
2.0
?
?
dB
MHz
series (Test circuit only)
Slew Rate
SR
COMP_GND = 10 pF
?
8.0
?
V/ m s
VTT ACTIVE TERMINATOR
VTT Tracking VDDQ/2 at S0 Mode
dVTT0
VDDQ/2 ? VTT,
IOUT = 1.8 A (Sink Current)
IOUT = ?1.8 A (Source Current)
?30
?
?
?
?
30
mV
mV
Source Current Limit
Sink Current Limit
ILIMVTsrc
ILIMVTsnk
?
?
?
?
?2.3
2.3
?
?
A
A
3. Guaranteed by design, not tested in production.
http://onsemi.com
3
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