参数资料
| 型号： | NCP5212AMNTXG |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/19页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-QFN |
| 标准包装： | 1 |
| PWM 型： | 电流/电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 330kHz |
| 电源电压： | 4.5 V ~ 27 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 其它名称： | NCP5212AMNTXGOSDKR |
NCP5212A, NCP5212T
ELECTRICAL CHARACTERISTICS (V IN = 12 V, V CC = V CCP = 5 V, T A = ? 40 ° C to 85 ° C, unless other noted)
Characteristics
Symbol
Test Conditions
Min
Typ
Max
Unit
OVERCURRENT PROTECTION SETTING
Adjustable OC Threshold
V_OCTH
((CS+) ? (CS ? ))
(CS+) – (CS ? ),
During OC
threshold, set a
voltage at pin
OCP
VOCSET =
200 mV
VOCSET =
600 mV
15
52
20
60
25
68
mV
GATE DRIVERS
DH Pull ? HIGH Resistance
DH Pull ? LOW Resistance
DL Pull ? HIGH Resistance
DL Pull ? LOW Resistance
DH Source Current
DH Sink Current
DL Source Current
DL Sink Current
Dead Time
Negative Current Detection Threshold
SWN source leakage
Internal Resistor from DH to SWN
RH_DH
RL_DH
RH_DL
RL_DL
Isource_DH
Isink_DH
Isource_DL
Isink_DL
TD_LH
TD_HL
NCD_TH
ISWN_SD
R_DH_SWN
200 mA Source current
200 mA Sink current
200 mA Source current
200 mA Sink current
(Note 2)
(Note 2)
(Note 2)
(Note 2)
DL ? off to DH ? on (Note 2)
DH ? off to DL ? on (Note 2)
SWN ? PGND, at EN = 5 V
EN = 0 V, SWN = 0 V
(Note 2)
1
1
1
0.5
2.5
2.5
2.5
5
20
20
? 1
100
1
W
W
W
W
A
A
A
A
ns
ns
mV
m A
k W
CONTROL SECTION
EN Logic Input Voltage for Disable
EN Logic Input Voltage for MASTER
Mode
EN Logic Input Voltage for SLAVE
Mode
VEN_Disable
VEN_Master
VEN_Slave
Set as Disable
Hysteresis
Set as Master Mode
Set as Slave Mode
Hysteresis
0.7
150
1.7
2.4
100
1.0
200
1.95
2.65
175
1.3
250
2.25
2.9
250
V
mV
V
V
mV
EN Source Current
EN Sink Current
PGOOD Pin ON Resistance
PGOOD Pin OFF Current
IEN_SOURCE
IEN_SINK
PGOOD_R
PGOOD_LK
VEN = 0 V
VEN = 5 V
I_PGOOD = 5 mA
100
0.1
0.1
1
m A
m A
W
m A
SYNC CONTROL
SYNC pin leakage
SYNC frequency
Pulse Width
Clock Level Low
Clock Level High
SYNC Driving Capability
SYNC Source Current
ISYNC_LK
F_SYNC
PW_SYNC
V_CLKL
V_CLKH
SYNC_CL
ISYNC
Set as Slave Mode, SYNC = 5 V
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Set as Master Mode, load capacitor
between SYNC and GND (Note 2)
SYNC shorts to ground
1.2
416
0
5
1
20
20
uA
MHz
ns
V
V
pF
mApp
OUTPUT DISCHARGE MODE
Output Discharge On ? Resistance
Threshold for Discharge Off
Rdischarge
Vth_DisOff
EN = 0 V
0.2
20
0.3
35
0.4
W
V
2. Guaranteed by design, not tested in production.
http://onsemi.com
8
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