参数资料
型号: NCP5214MNR2G
厂商: ON Semiconductor
文件页数: 19/32页
文件大小: 0K
描述: IC CTLR NOTEBOOK DDR PWR 22-DFN
产品变化通告: Product Discontinuation 01/Oct/2008
标准包装: 2,500
应用: 控制器,DDR
输入电压: 4.5 V ~ 24 V
输出数: 2
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 22-VFDFN 裸露焊盘
供应商设备封装: 22-DFN(6x5)
包装: 带卷 (TR)
NCP5214
APPLICATION INFORMATION
Input Capacitor Selection for VDDQ Buck Regulator
Vripple + IL(ripple)
ESR, for small ton and large COUT
IL(ripple) +
(VIN?VOUT) VOUT
VOUT VOUT 2 (eq. 1)
ICIN(RMS) w IOUT *
ESR v
Vripple L fSW VIN
The input capacitor is important for proper regulation
operation of the buck regulator. It minimizes the input
voltage ripple and current ripple from the power source by
providing a local loop for switching current. The input
capacitor should be placed close to the drain of the
high?side MOSFET and source of the low?side MOSFET
with short, wide traces for connection. The input capacitor
must have large enough rms ripple current rating to
withstand the large current pulses present at the input of the
bulk regulator due to the switching current. The required
input capacitor rms ripple current rating can be estimated
by the following with minimum V IN :
VIN VIN
Besides, the voltage rating of the input capacitor should
be at least 1.25 times of the maximum input voltage.
Capacitance of around 20 m F to 50 m F should be sufficient
for most DDR applications. Ceramic capacitors are the
most suitable choice of input capacitor for notebook
applications due to their low ESR, high ripple current, and
(eq. 3)
where I L(ripple) is the inductor ripple current, t on is on?time,
and C OUT is the output capacitance.
The inductor ripple current can be calculated by the
equation:
(eq. 4)
L fSW VIN
where L is the inductance and f SW is the switching
frequency. The output ripple voltage can be reduced by
either using the inductor with larger inductance or the
output capacitor with smaller ESR. Thus, the ESR needed
to meet the ripple voltage requirement can be obtained by:
(eq. 5)
(VIN?VOUT) VOUT
The inductor ripple current is typically 30% of the
maximum load current and the ripple voltage is typically
2% of the output voltage. Thus, the above inequality can be
simplified to:
high voltage rating. POSCAP or OS?CON capacitors can
also be used since they have good ESR and ripple current
ESR v
0.02 VOUT
0.3 ILOAD(max)
(eq. 6)
rating, but they are larger in size and more expensive.
Aluminum electrolytic capacitors are also a choice for their
high voltage rating and low cost, but several aluminum
capacitors in parallel should be used for the required ripple
For the load transient, the output capacitor contributes to
both the load?rise and the load?release responses. The
voltage undershoot during step?up load can be calculated
by the equation:
current. If ceramic capacitors are used, X5R and X7R types
are preferred rather than the Y5V type since the X5R and
X7R types are ceramic capacitors and have smaller
Vundershoot + D ILOAD
ESR )
D ILOAD
COUT
V IN
1? V OUT
fSW
ESR v undershoot
V
D ILOAD
tolerance and temperature coefficient.
Output Capacitor Selection for VDDQ Buck Regulator
The output filter capacitor plays an important role in
steady state output ripple voltage, load transient
requirement, and loop compensation stability. The ESR
and the capacitance of the output capacitor are the most
important parameters needed to be considered. In general,
the output capacitor must have small enough ESR for
output ripple voltage and load transient requirement.
Besides, the capacitance of the output capacitor should be
large enough to meet the overshoot and undershoot during
(eq. 7)
where D I LOAD is the change in output current. If the second
term is ignored, then it becomes the following inequality:
(eq. 8)
The maximum ESR requires to meet voltage undershoot
requirement at step?up load transient can be estimated
from the above inequality.
Then, the required output capacitor capacitance can be
obtained by the following:
load transient. Since steady state output ripple voltage,
transient load undershoot and overshoot are the largest at
maximum V IN , the ESR and capacitance of output
COUT w
D ILOAD
Vundershoot? D ILOAD
ESR
V IN
1? V OUT
fSW
capacitor should be estimated at the maximum V IN
condition.
For steady output ripple voltage, both ESR and
capacitance of the output capacitor are the contributing
factors, however, the capacitor ESR is the dominant factor.
(eq. 9)
The output voltage overshoot during load?release is
because the excessive stored energy in the inductor is
absorbed by the output capacitor. The overshoot voltage
can be calculated by the following equation:
Vripple + IL(ripple)
ESR )
The output ripple voltage is calculated as follows:
IL(ripple)  ton
COUT
(eq. 2)
Vovershoot +
LI2STEP(peak) ) COUTV2OUT
COUT
?VOUT
(eq. 10)
http://onsemi.com
19
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