参数资料
| 型号： | NCP5381MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/35页 |
| 文件大小： | 0K |
| 描述： | IC CTLR BUCK 2/3/4PHASE 40-QFN |
| 产品变化通告： | Specification Change MSL Updated 13/June/2008 Product Discontinuation 01/Oct/2008 |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel Pentium? IV |
| 输入电压： | 10.8 V ~ 13.2 V |
| 输出数： | 4 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（7x7） |
| 包装： | 带卷 (TR) |
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NCP5381
PIN DESCRIPTIONS
Pin No.
1
2–9
10
11
12
13
14
15
16
17
18
19
20
21, 23,
25, 27
22, 24,
26, 28
29
30 – 33
34
35
36
37
38
39
40
41
Symbol
EN
VID0–VID7
VR10/VR11
SS
ROSC
ILIM
AGND
VS+
VS--
DIFFOUT
COMP
VFB
VDRP
CSxN
CSx
DRVON
G1 – G4
VREF
DGND
VCC
VR_RDY
NTC
VR_FAN
VR_HOT
THPAD
Description
Pull this pin high to enable controller. Pull this pin low to disable controller. Either an open--collector output
(with a pull--up resistor) or a logic gate (CMOS or totem--pole output) may be used to drive this pin. A Low to
High transition on this pin will initiate a soft start. If the Enable function is not required, this pin should be tied
directly to VREF.
Voltage ID DAC inputs.
VR select bit. Connect this pin to VTT (1.25 V) to select the VR11 DAC table. Ground this pin to select the
VR10 DAC table with VR11 type startup. Connect this pin to V REF (4 V) to select VR10 DAC table with
legacy VR10 type startup.
A capacitor from this pin to ground programs the soft--start time.
A resistance from this pin to ground programs the oscillator frequency. Also, this pin supplies a regulated
2.0 V which may be used with a voltage divider to the ILIM pin to set the over current shutdown threshold as
shown in the Applications Schematics.
Over current shutdown threshold. To program the shutdown threshold, connect this pin to the R OSC pin via a
resistor divider as shown in the Applications Schematics. To disable the over current feature connect this pin
directly to the R OSC pin. To guarantee correct operation, this pin should only be connected to the voltage
generated by the R OSC pin – do not connect this pin to any externally generated voltages.
Power supply return for the analog circuits that control output voltage.
Non--inverting input to the internal differential remote V CORE sense amplifier.
Inverting input to the internal differential remote V CORE sense amplifier.
Output of the differential remote sense amplifier.
Output of the error amplifier.
Error amplifier inverting input. Connect a resistor from this pin to DIFFOUT. The value of this resistor and the
amount of current from the droop resistor (R DRP ) will set the amount of output voltage droop (AVP) during
load.
Current signal output for Adaptive Voltage Positioning (AVP). The voltage of this pin minus 1.3 V is
proportional to the output current. Connect a resistor from this pin to V FB to set the amount of AVP current
into the feedback resistor (R FB ) to produce an output voltage droop. Leave this pin open for no AVP.
Inverting input to current sense amplifier #x, x = 1, 2, 3, 4.
Non--inverting input to current sense amplifier #x, x = 1, 2, 3, 4.
Gate Driver enable output. This pin produces a logic HIGH to enable gate drivers and a logic LOW to disable
gate drivers and has an internal 70 k Ω to ground.
PWM control signal outputs to gate drivers.
Voltage reference pin. This pin may be used to implement remote NTC temperature sensing as shown in the
Applications Schematic.
Power supply return for the digital circuits. Connect to AGND.
Power for the internal control circuits.
Voltage Regulator Ready (PowerGood) output. Open drain type output with internal delays that will transition
High when V CORE is higher than 300 mV below DAC, Low when V CORE is lower than 380 mV below DAC,
and Low when V CORE is higher than DAC+185 mV. This output is latched Low if V CORE exceeds DAC+185
mV until V CC is removed.
Remote temperature sense connection. Connect an NTC thermistor from this pin to GND and a resistor from
this pin to V REF . As the NTC’s temperature increases the voltage on this pin will decrease.
Open drain type of output that will be low impedance when the voltage at the NTC pin is above 1.416 V.
This pin will transition to a high impedance state when the voltage at the NTC pin decreases below 1.176 V.
Open drain type of output that will be low impedance when the voltage at the NTC pin is above 1.086 V.
This pin will transition to a high impedance state when the voltage at the NTC pin decreases below 0.846 V.
Copper pad on the bottom of the IC for heatsinking. This pin should be connected to the ground plane under
the IC.
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5382 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2/3/4/5/6 Phase Buck Controller for VR10 and VR11 Pentium IV Processor Applications |
| NCP5382MNR2G | 功能描述:DC/DC 开关控制器 PHASE CONTROLLER 4 5 6 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5383 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2 Phase Buck Controller with Integrated Gate Drivers and AVP |
| NCP5383_1 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2 Phase Buck Controller with Integrated Gate Drivers and AVP |
| NCP5383MNR2G | 功能描述:DC/DC 开关控制器 Two Phase Buck Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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