参数资料
型号: NCP5392QMNR2G
厂商: ON Semiconductor
文件页数: 18/30页
文件大小: 0K
描述: IC PHASE CONTROLLER 2/3/4 40-QFN
标准包装: 2,500
应用: 控制器,Intel VR11,VR11.1,AMD CPU
输入电压: 4.75 V ~ 5.25 V
输出数: 4
输出电压: 0.375 V ~ 1.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: 40-QFN(6x6)
包装: 带卷 (TR)
NCP5392Q
FUNCTIONAL DESCRIPTION
General
The NCP5392Q provides up to four-- phase buck solution
which combines differential voltage sensing, differential
phase current sensing, and adaptive voltage positioning to
provide accurately regulated power necessary for Intel
VR11.1 CPU power system. NCP5392Q has been designed
to work with the NCP5359 driver.
AUTO--PSI Function
NCP5392Q makes energy saving possible without
receiving PSI signal from the CPU by wisely introducing
Auto-- PSI feature. The device will monitor VID lines for
transition into/out-- of Low Power States. When the VID
drops (An indication of entering power saving state), the
Auot-- PSI logic will detect the transition and enable PSI
mode. On the other hand, when the VID rises (exiting
power saving mode), the Auto-- PSI logic detects the
transition and exit PSI mode automatically. Auto-- PSI uses
the dynamic VID(DVID) transitions of VR11.0 and
VR11.1 to shed phases. The phase shedding improves the
efficiency of the Vcore regulator eventually. In PSI mode,
the total current limit is reduced by the ratio of the phase
count left after phase shedding.
Auto-- PSI function can be activated and deactivated by
toggling APSI_EN (PIN38), but with lower priority
compared to PSI signal. When PSI (PIN37) is pulled to low,
the system will be forced into PSI mode unconditionally,
and APSI_EN signal will be shielded.
NCP5392Q can be operated up to four phases. It operates
at one phase mode when the system enter PSI mode
automatically (for example, VID down from 1.2 V to 1.1 V).
Remote Output Sensing Amplifier(RSA)
A true differential amplifier allows the NCP5392Q to
measure V core voltage feedback with respect to the V core
ground reference point by connecting the V core reference
point to VSP, and the V core ground reference point to VSN.
This configuration keeps ground potential differences
between the local controller ground and the V core ground
reference point from affecting regulation of V core between
V core and V core ground reference points. The RSA also
subtracts the DAC (minus VID offset) voltage, thereby
producing an unamplified output error voltage at the
DIFFOUT pin. This output also has a 1.3 V bias voltage as
the floating ground to allow both positive and negative
error voltages.
Precision Programmable DAC
A precision programmable DAC is provided and system
trimmed. This DAC has 0.5% accuracy over the entire
operating temperature range of the part. The DAC can be
programmed to support either Intel VR11 VID code
High Performance Voltage Error Amplifier
The error amplifier is designed to provide high slew rate
and bandwidth. Although not required when operating as
the controller of a voltage regulator, a capacitor from
COMP to VFB is required for stable unity gain test
configurations.
Gate Driver Outputs and 2/3/4 Phase Operation
The part can be configured to run in 2-- , 3-- , or 4-- phase
mode. In 2-- phase mode, phases 1 and 3 should be used to
drive the external gate drivers as shown in the 2-- phase
Applications Schematic, G2 and G4 must be grounded. In
3-- phase mode, gate output G4 must be grounded as shown
in the 3-- phase Applications Schematic. In 4-- phase mode
all 4 gate outputs are used as shown in the 4-- phase
Applications Schematic. The Current Sense inputs of
unused channels should be connected to VCCP shown in
the Application Schematics. Please refer to table “PIN
CONNECTIONS vs. PHASE COUNTS” for details.
Differential Current Sense Amplifiers and Summing
Amplifier
Four differential amplifiers are provided to sense the output
current of each phase. The inputs of each current sense
amplifier must be connected across the current sensing
element of the phase controlled by the corresponding gate
output (G1, G2, G3, or G4). If a phase is unused, the
differential inputs to that phase’s current sense amplifier must
be shorted together and connected to the output as shown in
the 2-- and 3-- phase Application Schematics.
The current signals sensed from inductor DCR are fed into
a summing amplifier to have a summed--up output (CSSUM).
Signal of CSSUM combines information of total current of all
phases in operation.
The outputs of current sense amplifiers control three
functions. First, the summing current signal (CCSUM) of
all phases will go through DROOP amplifier and join the
voltage feedback loop for output voltage positioning.
Second, the output signal from DROOP amplifier also goes
to ILIM amplifier to monitor the output current limit.
Finally, the individual phase current contributes to the
current balance of all phases by offsetting their ramp
signals of PWM comparators.
Thermal Compensation Amplifier with VDRP and VDFB
Pins
Thermal compensation amplifier is an internal amplifier
in the path of droop current feedback for additional
adjustment of the gain of summing current and temperature
compensation. The way thermal compensation is
implemented separately ensures minimum interference to
the voltage loop compensation network.
specifications.
http://onsemi.com
18
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