参数资料
| 型号： | NCP5810MUTXG |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/13页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER AMOLED DUAL 1W 12-LLGA |
| 产品变化通告： | Product Obsolescence 14/Apr/2010 |
| 标准包装： | 1 |
| 显示器类型： | AMOLED |
| 配置： | 显示矩阵 |
| 电流 - 电源： | 1.5mA |
| 电源电压： | 2.7 V ~ 4.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-UFLGA 裸露焊盘 |
| 供应商设备封装： | 12-LLGA（3x3） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5810MUTXGOSCT |
NCP5810
Input and Output Capacitors
C OUTP and C OUTN store energy during the T OFF phase and
sustain the load during the T ON phase. In order to minimize
the output ripple, typically a 4.7 m F low ESR multi-layer
ceramic capacitor type X5R is recommended. Moreover two
10 m F in parallel can be used to improved the line transient
rejection in critical conduction mode of the inverter in this
case see recommendation in Buck-Boost Compensation
paragraph. To achieve high performances (signal integrity)
one 4.7 m F 6.3 V X5R should be used to bypass the power
input supply C INP (PVIN) and one 1.0 m F 6.3 V X5R to
bypass the analog input supply C INA (AVIN).
Also a particular care must be observed for DC-bias
effects in ceramic capacitor. Actually smaller the case-size
and higher the DC bias voltage, the bigger drop in
capacitance. For a stability viewpoint the percentage drop
in capacitance for the chosen input or output operating
voltage must be limit to 20%.
Some recommended capacitors include but are not
limited to:
4.7 m F 6.3 V 0603
TDK: C1608X5R0J475MT
TDK: CGB4B1X5R0J475M (0.5 mm)
4.7 m F 10 V 0805
TDK: C2012X5R1A475MT
MURATA: GRM219R61A475KE
10.0 m F 6.3 V 0805
TDK: C2012X5R0J106M (0.95 mm max)
10.0 m F 10 V 0805
TDK: C2012X5R1A106MT (1.25 mm)
Layout Recommendations
The high speed operation of the NCP5810 demands
careful attention to board layout and component
placement. To prevent electromagnetic interference (EMI)
problems and reduce voltage ripple of the device any high
current copper trace which see high frequency switching
should be optimized. Therefore, use short and wide traces
for power current paths and for power ground tracks.
In this application both couples of elements formed by
the Schottky diode D1 / capacitor C4 and D2 (optional) / C3
are in the high frequency switching path where current flow
is discontinuous. These components (D1/C4) in one hand
and (D2/C3) in other hand should be placed as close as
possible to reduce parasitic inductance connection. Also it
is important to minimize the area of the SWP and SWN
nodes and used the ground plane under them to minimize
ORDERING INFORMATION
cross-talk to sensitive signals and IC. The exposed pad of
the package must be connected to ground plane of the board
that is important for EMI and thermal management. Also,
PGND and AGND pin connection must be connected to the
ground plane. In addition, the inductors track connection
L1, L2 and input bypass capacitor C1, C2 must be placed
shortly to the NCP5810 pins connection to reduce EMI.
Finally it is always good practice to keep the sensitive
tracks such as feedback connection (VS and FBN) away
from switching signal connections (SWP and SWN) by
laying the tracks on the other side of PCB. Figure 16 show
an example of optimized PCB layout.
10.48
Figure 16. Recommended PCB Layout
Thermal Considerations
Careful attention must be paid to the internal power
dissipation of the NCP5810. The power dissipation is a
function of efficiency and output power. Hence, increasing
the output power requires better components selection. For
example, should one change inductors: larger inductor
value (in micro Henri) and/or lower DCR may improve
efficiency. Adding the optional Schottky diode D2
provides a lower drop when the current flowing from the
inductor to the load, thereby improving the boost converter
efficiency.
The exposed thermal pad that is designed to be soldered
to the ground plane to used the PCB as a heatsink. This
ground should then be connected to an internal copper
ground plane with thermal via placed directly under the
package to spread out the heat dissipated by the NCP5810
Device
NCP5810MUTXG
Package
LLGA-12 3x3 mm
Shipping ?
3000 / Tape & Reel
(Pb-Free)
?For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Demo Board Available:
? The NCP5810GEVB/D evaluation board that configures the device in typical application to supply constant voltage.
http://onsemi.com
12
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| NCP582DSQ15T1G | 功能描述:低压差稳压器 - LDO 1.5V 150mA w/Enable Low Noise RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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