参数资料
| 型号： | NCP5810MUTXG |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/13页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER AMOLED DUAL 1W 12-LLGA |
| 产品变化通告： | Product Obsolescence 14/Apr/2010 |
| 标准包装： | 1 |
| 显示器类型： | AMOLED |
| 配置： | 显示矩阵 |
| 电流 - 电源： | 1.5mA |
| 电源电压： | 2.7 V ~ 4.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-UFLGA 裸露焊盘 |
| 供应商设备封装： | 12-LLGA（3x3） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5810MUTXGOSCT |
NCP5810
PIN FUNCTION DESCRIPTION
Pin
1
Pin Name
VOUTP
Type
OUTPUT
Description
Positive Power Output: A filter capacitor is necessary on this pin for the stability of the loop, to
smooth the current flowing into the load, and limit the noise created by the fast transients present in
this circuitry. A 4.7 m F ceramic bypass capacitor to GND is recommended. Care must be observed to
avoid EMI through the PCB copper tracks connected to this pin.
2
3
SWP
PGND
POWER
POWER
Switch LXP: Positive power switch pin where one end of the L1 inductor is connected. Typical ap‐
plication uses a 4.7 m H inductor.
Power Ground: This pin is the power ground and carries the high switching current. A high quality
ground must be provided to avoid any noise spikes/uncontrolled operation. Care must be observed to
avoid high-density current flow in a limited PCB copper track.
4
5
AGND
VREF
POWER
OUTPUT
Analog Ground: This pin is the analog ground of the device notably used by VREF.
Voltage Reference: This output provides a 1.265 V voltage reference used notably for the negative
feedback resistive network.
6
VS
INPUT
Positive Output Voltage Sense: This pin is the output voltage sense input for the positive boost
converter and must be connected to COUTP bypass capacitor.
7
FBN
INPUT
Feedback Negative: This pin is the feedback voltage input for the negative Buck-Boost inverter. The
middle point of a resistive bridge divider must be connected here. The resistive network must be con‐
nected between VREF and the anode of external Schottky.
8
AVIN
POWER
Analog Power Supply: The external voltage supply is connected to this pin. A 4.7 m F ceramic ca‐
pacitor must be connected across this pin and the power ground to achieve the specified output pow‐
er parameters.
9
EN
INPUT
Enable: An active high logic level on this pin enables the circuit. A built-in pull-down resistor disables
the device if the pin is left open. Also in disable condition the device provides a true cut-off from PVIN
to VOUTP and SWN.
10
11
SWN
PVIN
INPUT
POWER
Switch Negative: Negative power switch pin where one end of the L2 inductor is connected. Typical
application uses a 4.7 m H inductor.
Power Supply: This pin is the power supply of the device. A 4.7 m F ceramic capacitor or larger must
bypass this input to the ground. This capacitor should be placed as close as possible to this input.
12
LXP
POWER
Switch LXP: The inductor should be connected between this node and SWP. This output supplies
power from PVIN and gives a true-cut off function in disable condition.
http://onsemi.com
3
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