参数资料
型号: NCV5500DTADJRKG
厂商: ON Semiconductor
文件页数: 9/13页
文件大小: 0K
描述: IC REG LDO ADJ .5A DPAK-5
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 1.25 V ~ 5 V
输入电压: 2.5 V ~ 16 V
电压 - 压降(标准): 0.23V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA
电流 - 限制(最小): 500mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: TO-252-5,DPak(4 引线 + 接片),TO-252AD
供应商设备封装: DPAK-5
包装: 带卷 (TR)
NCP5500, NCV5500, NCP5501, NCV5501
Calculating Resistors for the ADJ Versions
The adjustable version uses feedback resistors to adjust
the output to the desired output voltage. With V out connected
to ADJ, the adjustable version will regulate at 1.25 V
  4.9% (1250   61.25 mV).
Output voltage formula with an external resistor divider:
Ripple Rejection: The ratio of the peak ? to ? peak input ripple
voltage to the peak ? to ? peak output ripple voltage.
Current Limit: Peak current that can be delivered to the
output.
Calculating Power Dissipation
The maximum power dissipation for a single output
V out +
1.25 V * 60E ? 9 @
(R 1 @ R 2)
(R 1 ) R 2 )
@
(R1 ) R2)
R 2
regulator (Figure 21) is:
(eq. 1)
P D(max) + V in(max) * V out(min) I out(max) ) V in(max) I GND
150 ? C * T A
R q JA +
Where
R 1 = value of the divider resistor connected between V out
and ADJ,
R 2 = value of the divider resistor connected between ADJ
and GND,
The term “1.25 V” has a tolerance of   4.9%; the term
“60E ? 9” can vary in the range 15E ? 9 to 60E ? 9.
For values of R 2 less than 15 K W , the term within brackets
( [ ] ) will evaluate to less than 1 mV and can be ignored. This
simplifies the output voltage formula to:
V out = 1.25 V * ((R1 + R2) / R2)) with a tolerance of   4.9%,
which is the tolerance of the 1.25 V output when delivering
up to 500 mA of output current.
DEFINITION OF TERMS
Dropout Voltage: The input ? to ? output voltage differential
at which the circuit ceases to regulate against further
reduction input voltage. Measured when the output voltage
has dropped 2% relative to the value measured at nominal
input voltage. Dropout voltage is dependent upon load
current and junction temperature.
Input Voltage: The DC voltage applied to the input
terminals with respect to ground.
Line Regulation: The change in output voltage for a change
in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
Load Regulation: The change in output voltage for a change
in load current at constant chip temperature. Pulse loading
techniques are employed such that the average chip
temperature is not significantly affected.
Quiescent and Ground Current: The quiescent current is
the current which flows through the ground when the LDO
operates without a load on its output: internal IC operation,
bias, etc. When the LDO becomes loaded, this term is called
the Ground current. It is actually the difference between the
input current (measured through the LDO input pin) and the
output current.
Where
V in(max) is the maximum input voltage,
V out(min) is the minimum output voltage,
I out(max) is the maximum output current for the application,
I GND is the ground current at I out(max) .
Once the value of P D(max) is known, the maximum
permissible value of R q JA can be calculated:
(eq. 2)
P D
The value of R q JA can then be compared with those in the
Thermal Characteristics table. Those packages with R q JA
less than the calculated value in Equation 2 will keep the die
temperature below 150 ? C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R q JA :
R q JA + R q JC ) R q CS ) R q SA (eq. 3)
where
R q JC is the junction ? to ? case thermal resistance,
R q CS is the case ? to ? heatsink thermal resistance,
R q SA is the heatsink ? to ? ambient thermal resistance.
R q JC appears in the Thermal Characteristics table. Like
R q JA , it too is a function of package type. R q CS and R q SA are
functions of the package type, heat sink and the interface
between them. These values appear in data sheets of heat
sink manufacturers.
Thermal, mounting, and heat sink considerations are
further discussed in ON Semiconductor Application Note
AN1040/D.
http://onsemi.com
9
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