参数资料
型号: NCV887300D1R2G
厂商: ON Semiconductor
文件页数: 4/11页
文件大小: 0K
描述: IC REG CTRLR BST PWM CM 8-SOIC
标准包装: 1
PWM 型: 电流模式
输出数: 1
频率 - 最大: 1.1MHz
占空比: 89%
电源电压: 3.2 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 150°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 标准包装
其它名称: NCV887300D1R2GOSDKR
NCV8873
ELECTRICAL CHARACTERISTICS ( ? 40 ° C < T J < 150 ° C, 3.2 V < V IN < 40 V, unless otherwise specified) Min/Max values are
guaranteed by test, design or statistical correlation.
Characteristic
Symbol
Conditions
Min
Typ
Max
Unit
GENERAL
Quiescent Current, Sleep Mode
Quiescent Current, Sleep Mode
Quiescent Current, No switching
Quiescent Current, Switching,
normal operation
I q,sleep
I q,sleep
I q,off
I q,on
V IN = 13.2 V, EN = 0, T J = 25 ° C
V IN = 13.2 V, EN = 0, ? 40 ° C < T J < 125 ° C
Into VIN pin, EN = 1, No switching
Into VIN pin, EN = 1, Switching
?
?
?
?
2.0
2.0
1.5
4.0
?
6.0
2.5
6.0
m A
m A
mA
mA
OSCILLATOR
Minimum pulse width
t on,min
90
115
140
ns
Maximum duty cycle
Switching frequency
Soft ? start time
Soft ? start delay
Slope compensating ramp
D max
f s
t ss
t ss,dly
S a
YY = 00
YY = 00
From start of switching with V FB = 0 until
reference voltage = V REF
YY = 00
From EN → 1 until start of switching with
V FB = 0 with floating V C pin
YY = 00
84
900
1.3
?
114
86.5
1000
1.6
240
130
89
1100
1.9
280
146
%
kHz
ms
m s
mV/ m s
ENABLE/SYNCHRONIZATION
EN/SYNC pull ? down current
EN/SYNC input high voltage
EN/SYNC input low voltage
EN/SYNC time ? out ratio
SYNC minimum frequency ratio
SYNC maximum frequency
Synchronization delay
Synchronization duty cycle
I EN/SYNC
V s,ih
V s,il
%t en
%f sync,min
f sync,max
t s,dly
D sync
V EN/SYNC = 5 V
From SYNC falling edge, to oscillator con-
trol (EN high) or shutdown (EN low), Per-
cent of typical switching frequency
Percent of f s
From SYNC falling edge to GDRV falling
edge
?
2.0
0
?
?
1.1
?
25
5.0
?
?
?
?
?
50
?
10
5.0
800
350
80
?
100
75
m A
V
mV
%
%
MHz
ns
%
CURRENT SENSE AMPLIFIER
Low ? frequency gain
Bandwidth
ISNS input bias current
Current limit threshold voltage
Current limit,
Response time
Overcurrent protection,
Threshold voltage
Overcurrent protection,
Response Time
A csa
BW csa
I sns,bias
V cl
t cl
%V ocp
t ocp
Input ? to ? output gain at dc, ISNS v 1 V
Gain of A csa ? 3 dB
Out of ISNS pin
Voltage on ISNS pin
YY = 00
CL tripped until GDRV falling edge,
V ISNS = V cl (typ) + 60 mV
Percent of V cl
From overcurrent event, Until switching
stops, V ISNS = V OCP + 40 mV
0.9
2.5
?
360
?
125
?
1.0
?
30
400
80
150
80
1.1
?
50
440
125
175
125
V/V
MHz
m A
mV
ns
%
ns
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