参数资料
型号: NE57814DD
厂商: NXP Semiconductors N.V.
元件分类: 基准电压源/电流源
英文描述: DDR memory termination regulator with standby mode and enhanced efficiency
封装: NE57814DD<SOT786-2 (HSO8)|<<http://www.nxp.com/packages/SOT786-2.html<1<week 13, 2004,;
文件页数: 11/16页
文件大小: 203K
代理商: NE57814DD
Philips Semiconductors
Product data
NE57814
DDR memory termination regulator with
standby mode and enhanced efficiency
2003 Apr 03
11
Cascading the NE57814 for complex memory
systems
For high-performance computer systems, such as workstations and
servers, where two or more banks of independent memory arrays
are needed, the NE57814 can be cascaded to provide two
independent, but slaved termination systems. This type of
architecture allows the termination voltages to be within 12 mV of
one another, and the V
TT
can be controlled from a single node.
Cascading NE57814 terminators offers two advantages; memory
SIMMs can be brought closer to the terminator, which improves the
system noise, and it will better distribute any heat generated by the
terminator system. Use the RefOut pin from one NE57814 to the
ExtRefIn pin for the other NE57814(s) in the system to ensure that
the V
TT
voltages are identical.
The output of the NE57814 is a very low impedance voltage source
which means that the V
TT
outputs should never be wired together.
That is, NE57814s should never be wired in parallel. This is
because the terminators would “fight” one another if their output
were different by only a few millivolts.
The cascading method can be seen in Figure 13.
SL01887
V
DD
ExtRefIn
V
SS
V
TT
V
TT
SENSE
RefOut
V
D
V
ref
V
TT
50
μ
F
(Y5V)
0.1
μ
F
(Y5V)
NE57814
470
μ
F
(Electro)
0.1
μ
F
(Y5V)
0.1
μ
F
(Y5V)
INPUT VOLTAGE
( > V
TT
+ 0.25 V )
10
μ
F
(Y5V)
100
μ
F
(Electro)
V
DD
ExtRefIn
V
SS
V
TT
V
TT
SENSE
RefOut
V
D
50
μ
F
(Y5V)
0.1
μ
F
(Y5V)
NE57814
INPUT VOLTAGE
( > V
TT
+ 0.25 V )
Figure 13. Cascading terminator systems for complex memory systems.
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相关代理商/技术参数
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