参数资料
| 型号： | NIS6201DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/7页 |
| 文件大小： | 0K |
| 描述： | IC REG SWITCHED CAP 15V 8SOIC |
| 产品变化通告： | Product Discontinuation 09/Jan/2008 |
| 标准包装： | 2,500 |
| 类型： | 切换式电容器（充电泵） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 15V |
| 输入电压： | 7 V ~ 15 V |
| 频率 - 开关： | 1.3MHz |
| 电流 - 输出： | 20mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-SOICN |
NIS6201
Rseries
The overcharge comparator detects when the voltage at
Vreg is 10% greater than its set level. If this situation
occurs, the overcharge circuit overrides the oscillator and
turns on the bottom FET of the driver stage. This shunts the
start ? up current directly to ground and bypasses the
Pshunt diode +
(Vin * VCC)
VCC @
* 2 mA * (Iout @ nstages)
capacitor on Vreg thus allowing for safe start ? ups at high
input voltages.
Oscillator
The oscillator in this chip operates at a nominal
frequency of 1 MHz. The FETs have an on resistance of
20 W and can drive loads in excess of 20 mA. Since the
charge diodes and capacitors are external, this device can
drive a “floating” voltage that is referenced to the input bus
such as is shown in Figure 7. The “isolation” voltage for the
regulated output is limited only by the ratings of these
external components. The oscillator can also drive a
conventional voltage doubler circuit or an inverting output
stage.
Total Power Consumption
The SO ? 8 package used for this chip has a power rating
of 570 milliwatts. The major losses in this device come
from three circuits plus the bias current. These are the
following:
Shunt Diode
The power dissipated in this diode is due to the current
through the input series resistor when the input exceeds 15
volts. The current in the diode is the current through the
LDO
The power lost in the LDO pass transistor is calculated
by the voltage drop across it and the current through it. As
was the case with the shunt diode, when calculating the
load current, the number of pump stages must be accounted
for.
PLDO + (VCC * Vreg) @ (2mA ) (Iout @ nstages))
Oscillator
The power dissipated in the oscillator section can be
approximated by multiplying the square of the load current
by the typical on resistance.
POsc + Iout2 @ 20 W
Bias Current
The bias current is simply the input voltage at the Vcc pin
multiplied by 2 mA.
The total power dissipated by the chip is the sum of these
four losses. If the input voltage does not exceed 15 volts,
the shunt diode losses can be ignored. The sum of these
losses should not exceed the power rating for the device.
Note that the power rating is specified at 25 ° C and must be
derated at higher operating temperatures.
input resistor less the output and bias currents in the chip.
The output current is equal to the load current unless
multiple pump stages are used in which case it is multiplied
by the number of stages in use. An additional 2 mA of bias
current is required to operate the charge pump.
http://onsemi.com
6
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