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参数资料
型号： NOA1302DCRG
厂商： ON Semiconductor
文件页数： 3/9页
文件大小： 0K
描述： AMBIENT LIGHT SENSOR SSPO8
产品变化通告： Product Discontinuation 27/Jul/2012
标准包装： 2,500
带接近传感器： 无
电源电压： 3 V ~ 3.6 V
输出类型： 数字 - I²C
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 8-TSSOP，8-MSOP（0.118"，3.00mm 宽）
包装： 带卷 (TR)
NOA1302
Table 4. OPERATING RANGES
Standard Mode
Fast Mode
Rating
Power supply voltage
Power supply current (VDD = 3.3 V)
Low level input voltage (VDD related input levels)
High level input voltage (VDD related input levels)
Hysteresis of Schmitt trigger inputs (VDD > 2 V)
Low level output voltage (open drain) at 3 mA sink
current (VDD > 2 V)
High level output voltage (with 1 k W pullup resist-
ance) at and output current of ? 20 m A (VDD > 2 V)
Input current of IO pin with an input voltage
between 0.1 VDD and 0.9 VDD
Output low current
Capacitance on IO pin
Operating free ? air temperature range
Symbol
VDD
IDD
V IL
V IH
V hys
V OL
V OH
I I
I OL
C I
T A
Min
3.0
325
? 0.3
0.7 VDD
N/A
0
VDD ? 0.1
? 10
?
?
0
Max
3.6
950
0.3 VDD
VDD + 0.2
N/A
0.4
N/A
10
45
10
70
Min
3.0
325
? 0.3
0.7 VDD
0.05 VDD
0
VDD ? 0.1
? 10
?
?
0
Max
3.6
950
0.3 VDD
VDD + 0.2
?
0.4
N/A
10
45
10
70
Unit
V
m A
V
V
V
V
V
m A
mA
pF
° C
Table 5. ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over VDD = 3.3 V, 0 ° C < T A < 70 ° C) (Note 3)
Standard Mode
Fast Mode
Parameter
SCL clock frequency
Hold time for START condition. After this period, the first clock
pulse is generated.
Low period of SCL clock
High period of SCL clock
Data hold time for I 2 C ? bus devices
Data set ? up time
Rise time of both SDA and SCL (input signals) (Note 4)
Fall time of both SDA and SCL (input signals) (Note 4)
Rise time of SDA output signal (Note 4)
Fall time of SDA output signal (Note 4)
Output fall time from V IHmin to V ILmax with a bus capacitance
from 10 pF to 250 pF. (Note 5)
Set ? up time for STOP condition
Bus free time between STOP and START condition
Capacitive load for each bus line
(including all parasitic capacitance)
Noise margin at the low level for each connected device
(including hysteresis)
Noise margin at the high level for each connected device
(including hysteresis)
Symbol
f SCL
t HD;STA
t LOW
t HIGH
t HD;DAT_d
t SU;DAT
t r_INPUT
t f_INPUT
t r_OUT
t f_OUT
t of
t SU;STO
t BUF
C L
V nL
V nH
Min
10
4.0
4.7
4.0
0
250
5
5
?
?
2
4.0
4.7
?
0.1 VDD
0.2 VDD
Max
100
?
3.45
?
300
300
1000
1000
250
?
?
250
?
?
Min
100
0.6
1.3
0.6
0
100
5
5
?
?
2
0.6
1.3
?
0.1 VDD
0.2 VDD
Max
400
?
0.9
?
300
300
1000
1000
250
?
?
250
?
?
Unit
kHz
m S
m S
m S
m S
nS
nS
nS
nS
nS
nS
m S
m S
pF
V
V
3. Refer to Figure 3 for more information on AC characteristics
4. The rise time and fall time are measured with a pull ? up resistor R p = 1 k W and C b of 250 pF (including all parasitic capacitances).
5. Cb = capacitance of one bus line, maximum value of which including all parasitic capacitances should be less than 250 pF.
http://onsemi.com
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