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参数资料
| 型号： | NVT2008BQ |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 通用总线功能 |
| 英文描述： | Bidirectional voltage-level translator for open-drain and push-pull applications |
| 中文描述： | GTL TO TTL TRANSCEIVER, PQCC20 |
| 封装： | 2.50 X 4.50 MM, 0.85 MM HEIGHT, LEAD FREE, PLASTIC, MO-241, SOT764-1, VQFN-20 |
| 文件页数： | 8/26页 |
| 文件大小： | 459K |
| 代理商： | NVT2008BQ |
NVT2008_NVT2010
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 — 8 September 2010
8 of 26
NXP Semiconductors
NVT2008; NVT2010
Bidirectional voltage-level translator
7.2 Bidirectional translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower
voltage to higher voltage), the EN input must be connected to VREFB and both pins pulled
to HIGH side V
pu(D)
through a pull-up resistor (typically 200 k
Ω
). This allows VREFB to
regulate the EN input. A filter capacitor on VREFB is recommended. The master output
driver can be totem pole or open-drain (pull-up resistors may be required) and the slave
device output can be totem pole or open-drain (pull-up resistors are required to pull the Bn
outputs to V
pu(D)
). However, if either output is totem-pole, data must be unidirectional or
the outputs must be 3-stateable and be controlled by some direction-control mechanism
to prevent HIGH-to-LOW contentions in either direction. If both outputs are open-drain, no
direction control is needed.
The reference supply voltage (V
ref(A)
) is connected to the processor core power supply
voltage. When VREFB is connected through a 200 k
Ω
resistor to a 3.3 V to 5.5 V V
pu(D)
power supply, and V
ref(A)
is set between 1.0 V and (V
pu(D)
1 V), the output of each An
has a maximum output voltage equal to VREFA, and the output of each Bn has a
maximum output voltage equal to V
pu(D)
.
Fig 9.
Bidirectional translation to multiple higher voltage levels
EN
VREFB
002aae133
B1
B2
200 k
Ω
CHIPSET I/O
V
CC
5 V
totem pole or
open-drain I/O
GND
VREFA
A1
A2
B3
V
CC
Bn
3.3 V
A3
An
CPU I/O
V
CORE
1.8 V
1.5 V
1.2 V
1.0 V
SW
NVT20XX
SW
SW
CHIPSET I/O
SW
B4
A4
B5
A5
SW
SW
B6
A6
SW
相关PDF资料 |
PDF描述 |
|---|---|
| NVT2008PW | Bidirectional voltage-level translator for open-drain and push-pull applications |
| NVT2010BQ | Bidirectional voltage-level translator for open-drain and push-pull applications |
| NVT2010BS | Bidirectional voltage-level translator for open-drain and push-pull applications |
| NVT2010PW | Bidirectional voltage-level translator for open-drain and push-pull applications |
| NX1117CE12Z | Low-dropout linear regulators |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NVT2008BQ,115 | 功能描述:转换 - 电压电平 +/-50mA 1.5ns 1-5.5V RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| NVT2008PW,118 | 功能描述:转换 - 电压电平 +/-50mA 1.5ns 1-5.5V RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| NVT2010 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Smart, simple solutions for the 12 most common design concerns |
| NVT2010BQ,118 | 功能描述:转换 - 电压电平 +/-50mA 1.5ns 1-5.5V RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| NVT2010BS,115 | 功能描述:转换 - 电压电平 +/-50mA 1.5ns 1-5.5V RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
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