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| 型号： | OP279GSZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP GP R-R 5MHZ DUAL 8SOIC |
| 标准包装： | 2,500 |
| 放大器类型： | 通用 |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 3 V/µs |
| 增益带宽积： | 5MHz |
| 电流 - 输入偏压： | 300nA |
| 电压 - 输入偏移： | 4000µV |
| 电流 - 电源： | 3.75mA |
| 电流 - 输出 / 通道： | 50mA |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 12 V，±2.25 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
OP179/OP279
–7–
REV. G
In order to achieve rail-to-rail output behavior, the OP179/OP279
design employs a complementary common-emitter (or gmRL)
output stage (Q15-Q16), as illustrated in Figure 2. These
amplifiers provide output current until they are forced into
saturation, which occurs at approximately 50 mV from either
supply rail. Thus, their saturation voltage is the limit on the
maximum output voltage swing in the OP179/OP279. The
output stage also exhibits voltage gain, by virtue of the use of
common-emitter amplifiers; and, as a result, the voltage gain of
the output stage (thus, the open-loop gain of the device) exhib-
its a strong dependence to the total load resistance at the output
of the OP179/OP279 as illustrated in TPC 7.
Q7
Q3
Q15
Q9
105
VPOS
VNEG
Q13
VOUT
Q4
Q16
I3
I4
Q11
Q12
Q5
Q10
I2
Q1
Q2
I1
Q8
Q6
105
Q14
150
Figure 2. OP179/OP279 Equivalent Output Circuit
Input Overvoltage Protection
As with any semiconductor device, whenever the condition
exists for the input to exceed either supply voltage, the device’s
input overvoltage characteristic must be considered. When an
overvoltage occurs, the amplifier could be damaged, depending
on the magnitude of the applied voltage and the magnitude of
the fault current. Figure 3 illustrates the input overvoltage char-
acteristic of the OP179/OP279. This graph was generated with
the power supplies at ground and a curve tracer connected to
the input. As can be seen, when the input voltage exceeds either
supply by more than 0.6 V, internal pn-junctions energize,
which allows current to flow from the input to the supplies. As
illustrated in the simplified equivalent input circuit (Figure 1),
the OP179/OP279 does not have any internal current limiting
resistors, so fault currents can quickly rise to damaging levels.
This input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. For the OP179/OP279, once
the input voltage exceeds the supply by more than 0.6 V, the
input current quickly exceeds 5 mA. If this condition continues to
exist, an external series resistor should be added. The size of the
resistor is calculated by dividing the maximum overvoltage by
5 mA. For example, if the input voltage could reach 100 V, the
external resistor should be (100 V/5 mA) = 20 k
. This resis-
tance should be placed in series with either or both inputs if they
are exposed to an overvoltage. Again, in order to ensure optimum
dc and ac performance, it is important to balance source imped-
ance levels. For more information on general overvoltage charac-
teristics of amplifiers refer to the 1993 Seminar Applications Guide,
available from the Analog Devices Literature Center.
5
–3
–5
–2.0
–4
1
–2
–1
2
3
4
2.0
1.0
0
–1.0
0
INPUT
CURRENT
–
mA
INPUT VOLTAGE – V
Figure 3. OP179/OP279 Input Overvoltage Characteristic
Output Phase Reversal
Some operational amplifiers designed for single-supply operation
exhibit an output voltage phase reversal when their inputs are
driven beyond their useful common-mode range. Typically for
single-supply bipolar op amps, the negative supply determines
the lower limit of their common-mode range. With these devices,
external clamping diodes, with the anode connected to ground
and the cathode to the inputs, input signal excursions are pre-
vented from exceeding the device’s negative supply (i.e., GND),
preventing a condition that could cause the output voltage to
change phase. JFET input amplifiers may also exhibit phase
reversal and, if so, a series input resistor is usually required to
prevent it.
The OP179/OP279 is free from reasonable input voltage range
restrictions provided that input voltages no greater than the
supply voltages are applied. Although the device’s output will
not change phase, large currents can flow through the input
protection diodes, shown in Figure 1. Therefore, the technique
recommended in the Input Overvoltage Protection section should
be applied in those applications where the likelihood of input
voltages exceeding the supply voltages is possible.
Capacitive Load Drive
The OP179/OP279 has excellent capacitive load driving capa-
bilities. It can drive up to 10 nF directly as the performance
graph titled Small Signal Overshoot vs. Load Capacitance
(TPC 18) shows. However, even though the device is stable, a
capacitive load does not come without a penalty in bandwidth.
As shown in Figure 4, the bandwidth is reduced to under 1 MHz
for loads greater than 3 nF. A “snubber” network on the output
will not increase the bandwidth, but it does significantly reduce
the amount of overshoot for a given capacitive load. A snubber
consists of a series R-C network (RS, CS), as shown in Figure 5,
connected from the output of the device to ground. This net-
work operates in parallel with the load capacitor, CL, to provide
phase lag compensation. The actual value of the resistor and
capacitor is best determined empirically.
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