参数资料
型号: OP293FSZ-REEL7
厂商: Analog Devices Inc
文件页数: 16/16页
文件大小: 0K
描述: IC OPAMP GP 35KHZ DUAL 8SOIC
设计资源: 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
标准包装: 1
放大器类型: 通用
电路数: 2
输出类型: 满摆幅
转换速率: 0.015 V/µs
增益带宽积: 35kHz
电流 - 输入偏压: 20nA
电压 - 输入偏移: 250µV
电流 - 电源: 30µA
电流 - 输出 / 通道: 25mA
电压 - 电源,单路/双路(±): 1.7 V ~ 36 V,±0.85 V ~ 18 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
产品目录页面: 768 (CN2011-ZH PDF)
其它名称: OP293FSZ-REEL7DKR
REV. B
OP193/OP293/OP493
–9–
GAIN
dB
60
40
10
100
1k
10k
100k
0
–20
TA
25°C
VS
±15V
FREQUENCY – Hz
20
60
50
40
20
10
100
1000
10000
CAPACITIVE LOAD – pF
30
10
0
OVERSHOOT
%
VS
5V TA
25°C
AV
1
50mV
VIN
150mV
LOADS TO GND
+OS
RL
+OS
| –OS |
RL
10k
+OS
| –OS |
RL
50k
–OS
RL
TPC 20. Small Signal Overshoot
vs. Capacitive Load
GAIN
dB
60
40
100
1k
10k
100k
1M
0
–20
VS
5V
FREQUENCY – Hz
20
PHASE
–40
GAIN
PHASE
De
g
rees
90
0
–45
45
–90
FUNCTIONAL DESCRIPTION
The OP193 family of operational amplifiers are single-supply,
micropower, precision amplifiers whose input and output ranges
both include ground. Input offset voltage (VOS) is only 75
V
maximum, while the output will deliver
±5 mA to a load. Sup-
ply current is only 17
A.
A simplified schematic of the input stage is shown in Figure 1.
Input transistors Q1 and Q2 are PNP devices, which permit the
inputs to operate down to ground potential. The input transis-
tors have resistors in series with the base terminals to protect the
junctions from over voltage conditions. The second stage is an
NPN cascode which is buffered by an emitter follower before
driving the final PNP gain stage.
The OP193 includes connections to taps on the input load
resistors, which can be used to null the input offset voltage, VOS.
The OP293 and OP493 have two additional transistors, Q7 and
Q8. The behavior of these transistors is discussed in the Output
Phase Reversal section of this data sheet.
The output stage, shown in Figure 2, is a noninverting NPN
“totem-pole” configuration. Current is sourced to the load by
emitter follower Q1, while Q2 provides current sink capability.
When Q2 saturates, the output is pulled to within 5 mV of
ground without an external pull-down resistor. The totem-pole
output stage will supply a minimum of 5 mA to an external
load, even when operating from a single 3.0 V power supply.
By operating as an emitter follower, Q1 offers a high impedance
load to the final PNP collector of the input stage. Base drive to
Q2 is derived by monitoring Q1’s collector current. Transistor
Q5 tracks the collector current of Q1. When Q1 is on, Q5 keeps
Q4 off, and current source I1 keeps Q2 turned off. When Q1 is
driven to cutoff (i.e., the output must move toward V–), Q5
allows Q4 to turn on. Q4’s collector current then provides the
base drive for Q3 and Q2, and the output low voltage swing is
set by Q2’s VCE,SAT which is about 5 mV.
2k
NULLING
TERMINALS
(OP193 ONLY)
+INPUT
R2A
2k
–INPUT
Q1
Q2
Q7
Q8
Q3
Q4
R2B
R1B
R1A
OP293,
OP493
ONLY
I1
D1
I2
I3
I4
Q5
Q6
TO
OUTPUT
STAGE
I5
I6
V–
V+
Figure 1. OP193/OP293/OP493 Equivalent Input Circuit
Q4
Q1
Q5
Q3
Q2
OUTPUT
I1
I2
I3
FROM
INPUT
STAGE
V+
V–
Figure 2. OP193/OP293/OP493 Equivalent Output Circuit
TPC 19. Closed-Loop Gain vs.
Frequency, VS =
±15 V
TPC 21. Open-Loop, Gain and
Phase vs. Frequency
GAIN
dB
60
40
100
1k
10k
100k
1M
0
–20
VS
±15V
FREQUENCY – Hz
20
PHASE
–40
GAIN
PHASE
De
g
rees
90
0
–45
45
–90
TPC 22. Open-Loop, Gain and
Phase vs. Frequency
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