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参数资料
| 型号： | P4C1256L70PCLF |
| 厂商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分类： | DRAM |
| 英文描述： | LOW POWER 32K x 8 STATIC CMOS RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDIP28 |
| 封装： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-28 |
| 文件页数： | 6/11页 |
| 文件大小： | 123K |
| 代理商： | P4C1256L70PCLF |
P4C1256L
Page 6 of 11
Document #
SRAM121
REV E
3ns
1.5V
Write
Active
Active
Read
* including scope and test fixture.
Note:
Because of the high speed of the P4C1256L, care must be taken
when testing this device; an inadequate setup can cause a normal
functioning part to be rejected as faulty. Long high-inductance leads
that cause supply bounce must be avoided by bringing the V
and
ground planes directly up to the contactor fingers. A 0.01 μF high
frequency capacitor
is also required between V
CC
and ground.
To avoid signal reflections, proper termination must be used; for
example, a 50
test environment should be terminated into a 50
load with 1.77V (Thevenin Voltage) at the comparator input, and a
589
resistor must be used in series with D
OUT
to match 639
(Thevenin Resistance).
AC TEST CONDITIONS
TRUTH TABLE
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
GND to 3.0V
1.5V
See Figures 1 and 2
Mode
Standby
Standby
D
OUT
Disabled
Standby
Standby
Power
I/O
WE
X
X
OE
X
X
CE
H
X
High Z
High Z
D
OUT
High Z
H
H
L
H
L
X
L
L
L
Active
High Z
Figure 1. Output Load
Figure 2. Thievenin Equivalent
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CE
CONTROLLED)
(10)
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| P4C1256L-70PI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
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| P4C1256L70SNCLF | 制造商:PYRAMID 制造商全称:Pyramid Semiconductor Corporation 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
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