参数资料
型号: P89C668HBBD
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: 80C51 8-bit Flash microcontroller family 64KB ISP FLASH with 8KB RAM
中文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44
封装: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-389-1, LQFP-44
文件页数: 8/54页
文件大小: 299K
代理商: P89C668HBBD
Philips Semiconductors
Preliminary data
P89C668
80C51 8-bit Flash microcontroller family
64KB ISP Flash with 8KB RAM
2001 Jul 27
8
Table 1.
89C51RC+/RD+ Special Function Registers
(Continued)
SYMBOL
DESCRIPTION
DIRECT
ADDRESS
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
MSB
D7
D6
D5
D4
LSB
RESET
VALUE
D3
D2
D1
D0
PSW*
Program Status Word
D0H
CY
AC
F0
RS1
RS0
OV
F1
P
00000000B
RCAP2H
#
RCAP2L
#
Timer 2 Capture High
Timer 2 Capture Low
CBH
CAH
00H
00H
SADDR#
SADEN#
Slave Address
Slave Address Mask
A9H
B9H
00H
00H
S0BUF
Serial Data Buffer
99H
xxxxxxxxB
9F
9E
9D
9C
9B
9A
99
98
S0CON*
Serial Control
98H
SM0/FE
SM1
SM2
REN
TB8
RB8
TI
RI
00H
SP
Stack Pointer
81H
07H
S1DAT#
Serial 1 Data
DAH
00H
S1IST
Serial 1 Internal Status
DCH
xxxxxxxx
S1ADR#
Serial 1 Address
DBH
SLAVE ADDRESS
GC
00H
S1STA#
Serial 1 Status
D9H
SC4
SC3
SC2
SC1
SC0
0
0
0
F8H
DF
DE
DD
DC
DB
DA
D9
D8
S1CON*#
Serial 1 Control
D8H
CR2
ENS1
STA
STO
SI
AA
CR1
CR0
00000000B
8F
8E
8D
8C
8B
8A
89
88
TCON*
Timer Control
88H
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
00H
CF
CE
CD
CC
CB
CA
C9
C8
T2CON*
Timer 2 Control
C8H
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
00H
T2MOD#
Timer 2 Mode Control
C9H
T2OE
DCEN
xxxxxx00B
TH0
TH1
TH2#
TL0
TL1
TL2#
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
8CH
8DH
CDH
8AH
8BH
CCH
00H
00H
00H
00H
00H
00H
TMOD
Timer Mode
89H
GATE
C/T
M1
M0
GATE
C/T
M1
M0
00H
WDTRST
SFRs are bit addressable.
SFRs are modified from or added to the 80C51 SFRs.
Reserved bits.
Watchdog Timer Reset
A6H
*
#
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an
inverting amplifier. The pins can be configured for use as an
on-chip oscillator.
To drive the device from an external clock source, XTAL1 should be
driven while XTAL2 is left unconnected. Minimum and maximum
high and low times specified in the data sheet must be observed.
RESET
A reset is accomplished by holding the RST pin high for at least two
machine cycles (12 oscillator periods), while the oscillator is running.
To insure a good power-on reset, the RST pin must be high long
enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-on, the voltage on
V
CC
and RST must come up at the same time for a proper start-up.
Ports 1, 2, and 3 will asynchronously be driven to their reset
condition when a voltage above V
IH1
(min.) is applied to RESET.
The value on the EA pin is latched when RST is deasserted and has
no further effect.
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